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 Forum: General Discussions   Topic: new to me: clothesline memory

Posted: Tue Feb 16, 2021 5:50 pm 

Replies: 3
Views: 2274

The idea, at minimum, is to make a lot more memory available than the address space of the host machine. No reason not to hang a pair of clotheslines, or a larger number. This is an interesting idea for some common applications. The idea of maximising the length of the queue of inline instructions,...

 Forum: Hardware in general   Topic: Implementing SPI on an 8-bit traditional data bus cpu

Posted: Tue Feb 16, 2021 12:06 pm 

Replies: 14
Views: 4864

In this post I describe the operation of the Master and Slave shift registers. I found that there was very little practical information on the 74xx299 online, as mostly other shift registers such as the 74xx166 and 74xx595 are covered as various Arduino I/O extenders. The 74xx299 is a universal 8-bi...

 Forum: Hardware in general   Topic: Implementing SPI on an 8-bit traditional data bus cpu

Posted: Tue Feb 16, 2021 1:49 am 

Replies: 14
Views: 4864

Michael - thankyou for the advice - much appreciated. I am groping my way through this personal challenge a few bits at a time. I currently use nSS to ensure that only 8 clock pulses are gated to the shift register. I understand the significance of multibyte transfers to the likes of SPI RAM where n...

 Forum: General Discussions   Topic: Thoughts about a high-density ISA

Posted: Mon Feb 15, 2021 11:38 pm 

Replies: 32
Views: 25393

Here's an idea: Segmented memory. I was thinking about something similar based on an idea from Marcel's Gigatron. He wrote an interpretive language vCPU, with about 30 primitive instructions and coded them into the bottom few pages of the 64K x 16 ROM. Every instruction had to be fewer than 32 cloc...

 Forum: Hardware in general   Topic: Implementing SPI on an 8-bit traditional data bus cpu

Posted: Mon Feb 15, 2021 10:55 pm 

Replies: 14
Views: 4864

Hi All, I'm not sure whether my grey matter going rusty through lack of exercise, but it has taken a lot longer than expected to implement the basics of SPI in discrete TTL ICs. Inspired by Dr. Jefyll's use of the 74163 as the basis of the SPI sequencer, I came up with the following state machine de...

 Forum: Hardware in general   Topic: Implementing SPI on an 8-bit traditional data bus cpu

Posted: Sat Feb 06, 2021 5:42 pm 

Replies: 14
Views: 4864

Having looked at the 3rd option, I'm not sure how the 74xx163 can ever start counting with QD tied to ENT.

The counter will always be disabled if ENT is low, and QD will always be low after power-up.

Hmmmmm

 Forum: Hardware in general   Topic: Implementing SPI on an 8-bit traditional data bus cpu

Posted: Sat Feb 06, 2021 4:32 pm 

Replies: 14
Views: 4864

Thanks for the links. The 3rd one looks the most interesting, using a 74xx163 and a NAND to generate the gated pulses. The combination of the 74xx165 to send serial data and the 74xx595 to receive it is a recurring theme, but I still think this could be simplified using the 74xx299. It might need an...

 Forum: Hardware in general   Topic: Implementing SPI on an 8-bit traditional data bus cpu

Posted: Sat Feb 06, 2021 12:56 pm 

Replies: 14
Views: 4864

Here is a first attempt at a SPI clock burst generator. SPI_counter_1.jpg Fundamentally we need to AND gate the clock with a pulse that is high for 8 clock pulses. We need a way to trigger the signal with a momentary pulse, and after generating an output of eight clock pulses, the circuit resets and...

 Forum: General Discussions   Topic: Thoughts about a high-density ISA

Posted: Sat Feb 06, 2021 12:58 am 

Replies: 32
Views: 25393

Ben, I'll put a stake or two in the ground: 1. 8 or 16-bit machine with 64K addressable words of memory. 2. "3M" workstation - at least a megabyte of memory, a megapixel display and a million operations per second i.e. 1 MIPS. Also costing 1 megapenny so $10,000 The PDP-11 probably satisfi...

 Forum: Hardware in general   Topic: Implementing SPI on an 8-bit traditional data bus cpu

Posted: Fri Feb 05, 2021 5:19 pm 

Replies: 14
Views: 4864

Thanks Ed,

This afternoon I have been having a tinker on "Digital" simulator.

The 74xx163 is definitely useful here, just need to get the clock gating to produce a burst of 8 clocks.

 Forum: Hardware in general   Topic: Implementing SPI on an 8-bit traditional data bus cpu

Posted: Fri Feb 05, 2021 1:57 pm 

Replies: 14
Views: 4864

Thanks for your suggestions - much appreciated. The 74HCT299 looks almost ideal to create a fast serial link between two devices. What is needed is some device that will create a Slave Select signal and a train of 8 gated clock pulses. This could possibly be as simple as an ATtiny85. For TTL enthusi...

 Forum: Hardware in general   Topic: Implementing SPI on an 8-bit traditional data bus cpu

Posted: Thu Feb 04, 2021 5:10 pm 

Replies: 14
Views: 4864

SPI is almost universal these days, for peripherals, LCDs, sensors, memory, uSD cards, GPIO expanders etc, etc. It's also a really neat way to communicate between 2 systems. The downside is that it is not implemented on the classic cpus - such as 6502, Z80 etc, creating an additional problem to inte...

 Forum: General Discussions   Topic: Thoughts about a high-density ISA

Posted: Wed Feb 03, 2021 11:34 am 

Replies: 32
Views: 25393

Rockwell's 65f11 family has Forth support at instruction level, I think. (Hmm, maybe not...) Ed, I always thought that the 65F11 was basically a 6502 with an on-chip ROM that contained a 6502 Forth. I was not fully aware of the R65C19, which clearly has had it's architecture tweaked to make it an e...

 Forum: General Discussions   Topic: Thoughts about a high-density ISA

Posted: Tue Feb 02, 2021 11:31 pm 

Replies: 32
Views: 25393

Ed, Introducing 16-bit instructions started with the 8080, continued and extended with the Z80 and probably reached a height with the 6809. The 6809 had 16-bit instructions for loads, stores, compares, adds, subtracts, transfers, exchanges, pushes and pulls. With two stack pointers, and all those 16...

 Forum: General Discussions   Topic: One K Computing - Roll Your own Challenge

Posted: Tue Feb 02, 2021 5:35 pm 

Replies: 7
Views: 2863

Another source of inspiration for the OK Challenge, could well be the CHIP-8 interpreted language and virtual machine. Originally implemented on an experimental TTL processor by Joseph Weisbecker, it was adopted by RCA and implemented on the 1801 and subsequently the 1802. The interpreter resided in...
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