|SPARCStation on FPGA
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|Author:||BigEd [ Tue May 20, 2014 7:47 pm ]|
|Post subject:||SPARCStation on FPGA|
Here's a VHDL library for a SPARC-compliant CPU, with many blog entries about the nature of pipelined CPU design
Here lives the TEM VHDL library.
This is about a soft core 32bits CPU with MMU, cache and FPU. It is based on the 32bits SPARC standard.
It comes with enough peripherals to implement a computer in a FPGA.
Via the mail archives for [rescue] at http://www.sunhelp.org/pipermail/rescue/, which are about rescuing old hardware.
(Via the discussion at https://news.ycombinator.com/item?id=7761566)
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