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A Forth CPU on FPGA for homebrew GPS http://anycpu.org/forum/viewtopic.php?f=13&t=333 |
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Author: | BigEd [ Wed Nov 09, 2016 9:45 am ] |
Post subject: | A Forth CPU on FPGA for homebrew GPS |
I was just reading through this fascinating but mostly over my head story of building a GPS receiver from scratch, and I see the author, Andrew Holme, uses a bespoke Forth CPU to perform some millisecond timescale tasks, freeing up FPGA fabric for the nanosecond timescale hardware engines. http://www.aholme.co.uk/GPS/Main.htm It's open source too, which is always nice. http://www.aholme.co.uk/GPS/SRC/2013/Verilog/CPU.v It's on a Spartan 3 FPGA, on a custom board: Quote: Features:
Quote: Total code plus data size of the GPS application is less than 750 words, despite all loops being unrolled. He links also to a previous project, the TTL-based Mark 1 Forth computer: http://www.aholme.co.uk/Mk1/Architecture.htm |
Author: | Dr Jefyll [ Wed Nov 09, 2016 4:57 pm ] | ||
Post subject: | Re: A Forth CPU on FPGA for homebrew GPS | ||
Quote: He links also to a previous project, the TTL-based Mark 1 Forth computer His Mark 2 is interesting, too. Among other changes, the bus width is doubled -- which slightly complicates byte addressability.
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Author: | BigEd [ Wed Nov 09, 2016 4:58 pm ] |
Post subject: | Re: A Forth CPU on FPGA for homebrew GPS |
Oops - I missed that! |
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