|A simple 1802/1805/1806 concept design
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|Author:||Mike, K8LH [ Sat Dec 08, 2018 5:23 pm ]|
|Post subject:||A simple 1802/1805/1806 concept design|
I started a relatively simple 1802/5/6 project recently. I became interested in the 1802 several years ago after coming across Lee Hart's 1802 'Membership Card'. I bought a couple chips and got a tiny system running but I got side-tracked and never got back to the project until now.
This is a 64K RAM system with bit-banged serial I/O (using the 1802/5/6 'Q' output and 'EF3' input) and an 'expansion' connector. A PIC microcontroller "loader" IC copies a pseudo ROM image from PIC flash memory into 1802/5/6 RAM memory at startup and the PIC disconnects itself from the 1802/5/6 after the loader operation. At that point the PIC simply provides a 1, 2, 4, or 8-MHz CPU clock, weak pull-ups on the 1802/5/6 data bus, and a 1.8432-MHz ACIA clock for a CMOS HD63B50P ACIA add-on.
I added a spot on the PCB for a Pi Zero. At the time I thought I would run the "bare metal" PiGFX VT100 serial terminal emulation software on it. However, using Linux and a terminal app' with file upload & download capability may not be a bad idea. Anyway, since this is the first PCB design I've done in almost 20 years, I'm tickled that the board came out so nice and my Pi Zero dimensions worked (all of the holes and edges line up perfectly, yippee!).
Comments, criticism, suggestions welcomed.
BTW, I'm working on similar designs with a similar form factor for 65C02 and Z80.
Cheerful regards, Mike McLaren, K8LH (Michigan, USA)
1802 4-chip #1.png [ 258.05 KiB | Viewed 1027 times ]
1802 4-chip #3.jpg [ 243.3 KiB | Viewed 1027 times ]
1802 4-chip #4.jpg [ 316.72 KiB | Viewed 1027 times ]
|Author:||BigEd [ Sun Dec 09, 2018 9:27 am ]|
|Post subject:||Re: A simple 1802/1805/1806 concept design|
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