Traditionally, discrete logic suggests 14- and 16-pin chips. Each generally contains several identical gates -- an arrangement which often won't suit your needs. (Example: a 74ac00 gives you four NAND gates whether you need that many or not.)
But that barrier -- and the speed barrier -- collapse when using
single-gate devices such as those in the
74LVC1G series (NXP, Texas Instruments). These "flyspeck" devices come in various packages, even the largest of which is very small. And, with (typically) one gate per package, they always suit your needs. Moreover, PCB traces can be shorter because each device gets located in the spot it's needed. Best of all, these chips are FAST.
They have a maximum propagation time around 3 ns (example: 2.7ns maximum for a SN74LVC1G10 3-input NAND driving 15 pF at 5 volts Vdd. Low voltage operation is somewhat slower.)
Edit: this TI document pertains to their logic-gate devices assembled in a single-, dual-, or triple- gate package.
The selection of logic functions is extensive, as the sampling below shows. Also there are
lots of tri-state and open-drain buffers, FET switches and so on not shown. For a complete listing I suggest you visit your favorite supplier's web site and run a search for parts beginning with 74LVC1G. Even that won't be a complete listing, as families other than 74LVC also feature one-gate logic. Notice that some logic functions require an 8-pin package for a single-gate, such as the 74LVC1G139 -- which is half a 74_139 decoder.
Attachment:
sampling of one-gate functions.png [ 51.45 KiB | Viewed 5240 times ]
To give an idea of the size, here's a 6-pin SOT-23 package -- the largest of the three available packages -- shown on a protoboard with .1" hole spacing (right) and on another protoboard with .050" hole spacing (left).
Attachment:
SOT-23-6 package on .100 and .050 grid.png [ 589.27 KiB | Viewed 5240 times ]
PCB mounting is the norm for these chips, but they could be hacked onto protoboard for one-off and experimental work. As you can see above, a .050" protoboard is more suitable than .100" but either could have SOT-23's soldered to it.
I personally prefer wire-wrap, so I designed some breakout boards to bring these tiny pinouts onto a .1" grid:
Attachment:
1G breakout 'a' and 'b'.png [ 37.54 KiB | Viewed 5274 times ]
The upper of the two breakouts shown above has artwork for power traces and bypass capacitors but leaves all the signal pins uncommitted. There's an assumption that pins 2 and 5 on each chip are Gnd and Vcc, and most 74LVC chips seem to match this (although other families may not).
The lower breakout cascades three gates into a fourth gate, resulting in
a nine-input gate with a max prop delay of about 6 ns. Note that the gates needn't be identical (can be a mixture of AND NAND XOR NOR etc). One use for a nine-input gate would be fine-grained address decoding for memory-mapped I/O. This breakout can also use '1G373 transparent latches and '1G175 flipflops since these have their outputs on pin 4, same as the AND NAND OR NOR chips.
-- Jeff
