Logic gates are traditionally supplied in 14- and 16-pin packages containing several identical gates -- an arrangement which often won't exactly suit your needs. For example, a 74ac00 gives you four NAND gates whether you need that many or not. But that barrier -- and the speed barrier -- collapse when using
single-gate devices such as those in the
74LVC1G series (NXP, Texas Instruments). Even the largest of these devices are pretty small. And, with typically one gate per package (the 2G series have two gates), they're far less likely to result in leftover, unneeded gates.
A more important factor is routing. PCB traces can be shorter because each device gets located in the spot it's needed. And, best of all, these chips are FAST.
They have a maximum propagation time around 3 ns. For example, 2.7ns is the maximum for a SN74LVC1G10 3-input NAND driving 15 pF at 5 volts Vdd. (Low voltage operation is somewhat slower.)
The attached TI document pertains to products supplied in a single-gate or dual-gate configuration. 5- and 6-pin packages are common, but 8-pin offerings include 74LVC1G139 (half of a 74_139 decoder) and 74VLC3G04, a triple inverter (half of a 74_04).
Attachment:
How to Select Little Logic scya049a.pdf
I've depicted some of the logic functions below, some of which (such as the 3-input XOR) aren't traditional. Also available but not shown are lots of tri-state and open-drain buffers, FET switches and so on. For a complete listing I suggest you visit your favorite supplier's web site and run a search for parts beginning with 74LVC1G. Even that won't be a complete listing, as families other than 74LVC also feature one-gate logic. Have a look for 2G and 3G, too.
Attachment:
sampling of one-gate functions.png
The images below give an idea of size. The 6-pin SOT-23 package -- the largest of the three available packages -- is a good match for protoboard with .050" hole spacing (left), and can, with the use of two flying leads, even be hacked onto protoboard with .1" hole spacing (right).
Attachment:
SOT-23-6 package on .100 and .050 grid.png
Of course PCB mounting is the most comfortable habitat for these chips, and that's what many of you will choose. But I often use wire-wrap or point-to-point, so I designed some breakout boards to bring these tiny pinouts onto a .1" grid. The artwork for my breakout boards can be found at the end of this post.
Attachment:
IMG_2756CrpTchLores.JPG
The first of the two breakouts below is very general. It's a 20-pin design that can optionally be chopped in half. The artwork has traces for power and bypass capacitors but leaves all the signal pins uncommitted. The only assumption is that pins 2 and 5 on each chip are Gnd and Vcc, and most 74LVC chips seem to match this (although other families may not).
The second breakout is a 14-pin design with a more specific function. Most commonly, it would be used to cascade three gates into a fourth gate, resulting in a nine-input gate with a max prop delay of about 6 ns. Note that the gates needn't be identical (can be a mixture of AND NAND XOR NOR etc).
One use for a fast, nine-input gate would be for fine-grained address decoding for memory-mapped I/O.
Less commonly, you might have occasion to replace one or more of the gates with a '1G373 transparent latch or '1G175 flipflop. (These have their outputs on pin 4, just as with the AND NAND OR NOR chips.)
-- Jeff
Attachment:
1G breakout 'a' and 'b'.png
