My experimental bit serial ALU is now available to view using "Digital" from my Github repository
https://github.com/monsonite/Bit_SerialHere is the circuit description for the latest design.
Circuit Description.
Bit Counter and Bit Time Decoder
The heart of the machine is a free running 4-bit counter IC1 (74xx161)which is used to keep track of the individual bits within the serial bit-packet. The QA, QB and QC outputs of this bit-counter feed the inputs of a 3 to 8 line decoder IC2 (74x138). The decoder provides individual low going outputs, which are used to control specific events within the time-frame of the bit-packet.
Program Counter
IC3 and IC4 are also 4-bit counters (74xx161) which are chained together to create an 8-bit Program Counter. The program counter is incremented by a positive pulse derived from IC2 output /Y7. In this experimental architecture the PC is only 8-bits and can address 256 bytes of memory. It could easily be extended to 12 or 16-bits to address 4K or 64K bytes of memory.
The PC has the means to accept a parallel load, which will effectively cause it to jump to a new address supplied via the parallel load. Shift register IC17 (74xx164) acts as an Address Register and can supply the jump address to the Program Counter.
ROM Addressing and serial conversion
In the experimental circuit, the PC adresses two 2K ROMs IC5 and IC6. These ROMs allow two separate streams of stored data to be generated for test purposes. This data is converted from parallel to serial by shift registers IC6 and IC8 (74xx166). These registers can be used to feed data into the serial ALU to allow arithmetical or logical operations to be performed on it. These registers are loaded using a signal from the bit-time decoder IC2 output /Y0 - meaning that the registers are updated synchronously with the start of the serial packet Bit_0.
Bit Serial ALU
The bit serial ALU is based on quad XOR gates IC9 (74xx86) and quad NAND gates IC10 (74xx00). The XOR and NAND gates are configured as a full-adder, with a further 2 XOR gates at its A and B inputs to allow one or both inputs to be negated (1's complement). This allows subtraction, inversion and several other logical functions to be created.
A is considered to be the Accumulator and B is the source of the other 8-bit operand, supplied from memory. The ALU is capable of the following functions on opearands A and B:
ADD
SUB
ADC add with carry
SBB subtract with borrow
AND
OR
XOR
NEG 1's complement
INC Add 1 (or any other short constant)
DEC Subtract 1 (or any other short constant)
The full adder has inputs for the operands A and B and also a Carry input Cin. The adder provides the usual Sum and Carry outputs. A D-type flip-flop IC11 (74xx74) allows any Carry out signal produced when the inputs are summed to be fed forward so that it can be included in the next bit addition.
Front Panel Display and User Controls
To make the computer more user fiendly and to facilitate development and testing, a serias of user displays have been added to allow the operation to be observed.
Output Register and Binary Display
The Sum output of the ALU is fed to a deserialiser shift register IC12 (74xx164). This is a serial-in, parallel out shift register which drives an array of 8 LEDs. This is a convenient means of monitoring the serial output from the ALU, and visualising it as an 8-bit number on the array of LEDs.
Hexadecimal Display
In addition to this simple binary output indicator, a further two shift -registers IC13 and IC 14 are used to create a latched hexadecimal display of the last two serial output packets from the ALU. They are based around an 8-bit serial to parallel shift register (74xx595), which has the added advantage of having an output latch. This allows the output to be latched at the correct time to show the correct bit packet on the hexadecimal display. This latch signal needs to be timed using the /Y1 output of the bit-decoder IC2. The first output byte is latched on IC13 and displayed, then after 8 clock cycles the packet has been transferred to IC14 and latched to the display. This allows the "last two" results of the ALU operation to be viewed. Additional shift registers and hex displays could be added to extend this display if required.
Input Toggle Switches.
This is a series of 8 push buttons which allow a single byte to be entered into the machine. The push buttons are each connected to a D-type flip-flop IC16 (eg 2 x 74xx74 ) which allows a single push of the switch to toggle the state of the output. The 8 signals are displayed both on a binary LED display and a hex display - and are loaded into a parallel to serial shift register IC15 using a "Deposit" button. This allows simple and accurate numerical entry.