Cray-2 at gate level in verilog - an incomplete adventure
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Author:  BigEd [ Wed Apr 25, 2018 9:20 am ]
Post subject:  Cray-2 at gate level in verilog - an incomplete adventure

This seemed like an interesting project, by jkula, who has already unearthed and laid out some interesting details about the architecture and construction of the Cray-2. The idea is to make a structurally accurate and working Verilog model of the Cray-2 - it seems to have got off to a good start, in late 2017, but then went quiet.

An overview of the machine:
The CRAY-2 mainframe contained four independent Background Processors, each more powerful than the CRAY-1 computer. Featuring a clock cycle time of 4.1 nanoseconds, faster than any other computer system available, each of these processors offered exceptional scalar and vector processing capabilities. The four Background Processors could operate independently on separate jobs or concurrently on a single problem. The very high-speed Local Memory integral to each Background Processor was available for temporary storage of vector and scalar data.

Common Memory was one of the most important features of the CRAY-2. It consists of 256 million 64-bit words randomly accessible from any of the four Background Processors and from any of the high-speed and common data channels. The memory was arranged in four quadrants with 128 interleaved banks. All memory access was performed automatically by the hardware. Any user could use all or part of this memory.

In conventional memory-limited computer systems, I/O wait times for large problems that use out-of-memory storage ran into hours. With the large Common Memory of the CRAY-2, many of these problems became CPU-bound.


The CRAY-2 mainframe was elegant in appearance as well as in architecture. The memory, computer logic, and DC power supplies were integrated into a compact mainframe composed of 14 vertical columns arranged in a 300┬░arc.

The upper part of each column contained a stack of 24 modules and the lower part contains power supplies for the system. Total cabinet height, including the power supplies, was 45 inches, and the diameter of the mainframe was 53 inches. Thus, the "footprint" of the mainframe was a mere 16 square feet of floor space.

Slightly abstracted:
The CRAY-2 hardware was constructed of synchronous networks of binary circuits. These circuits were packaged in 320 pluggable modules. The modules each contained 750 integrated circuit packages. The total integrated circuit population in the system was 240,000 units of which 75,000 were the memory.

There were 20 types of integrated circuit packages used in the logical networks of the machine. The circuits consisted of emitter coupled logic gates with a maximum gate width of six inputs. Total gate capacity of the circuit packages was 16. Most of the 20 types of circuit packages contained two levels of gates within the package. The package had 16 connecting pins.

A 250 megahertz oscillator controlled the timing throughout the circuit modules in the machine. The oscillator signal was transmitted as a square wave over 120 ohm twisted pair wires to each of the module connectors. Wire lengths were controlled so that the travel time to the individual modules was accurate to within 100 picoseconds. The oscillator square wave was delivered to each individual circuit package within the module. An 800 picosecond pulse was formed from the square wave to gate data into register latches within the packages. This 800 picosecond strobe pulse occured simultaneously throughout the machine with a period of 4 nanoseconds. This time was referred to as the machine clock period.

The pluggable modules were three-dimensional structures with an array of circuit packages 8 by 8 by 12 units. There were eight printed circuit boards which formed the module structure. Circuit interconnections were made in all three directions within the module. External dimensions of the module were one inch by four inches by eight inches. One end of the module contained a circuit connector which mated with a connector in the cabinet frame. This connector had 288 pairs of pins for twisted pair wire communications between the modules in the cabinet frame.

Modules were arranged in the cabinet frame in 14 columns each 24 modules height. The columns were arranged in a portion of a circle with a 20-degree angle between columns. An inert electronic liquid circulated in the cabinet frame and flowed through the module circuit boards across the four-inch surface. Liquid velocity was one inch per second through the modules. Total module column height was 24 inches.

The semicircle of module columns was located on top of a similar structure containing power supplies for the system. Total power consumption for the system was 180 kilowatts. Total cabinet height including the power supplies was 43 inches.

There's a sort of floorplan for assembling a (super)computer from modules:
From the above modules a variety of CRAY-2 systems can be assembled. Below is a module layout for a 4-CPU model, in this case serial number 2001.


(via Wolfgang Stief on G+)

Author:  Jkula [ Sun Sep 16, 2018 10:18 pm ]
Post subject:  Re: Cray-2 at gate level in verilog - an incomplete adventur

I'm actually still working on the project... Just haven't updated the site in awhile. I' m always looking for help.. If interested re ach out to me here or on my site

Author:  BigEd [ Mon Sep 17, 2018 9:01 am ]
Post subject:  Re: Cray-2 at gate level in verilog - an incomplete adventur

That's good to hear Jkula - and welcome!

Author:  Tor [ Mon Sep 17, 2018 5:40 pm ]
Post subject:  Re: Cray-2 at gate level in verilog - an incomplete adventur

Jkula - it's been some years since I last read about emulating (although that was in software) early Cray models. At that time the problem was that there was close to zero software available, e.g. operating system or compilers. Has that situation improved? That would be good news, if so.

Author:  Jkula [ Tue Sep 18, 2018 12:57 am ]
Post subject:  Re: Cray-2 at gate level in verilog - an incomplete adventur

Yeah there is more software... Also the computer museum supported by Paul Allen just picked up a complete cray2 and are working on getting it running. So I expect full software since I know the unit they have had all of it including os, compilers, etc.

Author:  Tor [ Tue Sep 18, 2018 8:02 am ]
Post subject:  Re: Cray-2 at gate level in verilog - an incomplete adventur

That's great news. Thanks!

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