The sun was shining, the birds where chirping., the grass... OK no birds or grass.
I decided since I had sun, to put the computer on the bench, and scope the signals.
A good bit of bounce on the clock A. power off. Lets check clock B.
Got every thing hooked up. and POOF a loud bang from the scope.
Time to order new test equipment. So the measuring will be delayed for a bit.

Oh no! A good old-fashioned scope with CRT and high voltages?

Yes, I have the Classic Boat anchor. Something went wrong in the sweep the section.
So for the price of a new VALVE, I have cheap digital scope on order.
I only want to test a few signals, so there is no need for fancy device at this time.

It works only under a **FULL MOON**. Could be heat related, cool here. Only when warmed up,does it work.
Address #15 gets set to 1 when at fault. Does not work at all with other ALU card. Need to order more parts for testing.
Got the new scope in, and any changes i make don't seem to change any thing. Crashes after a few minutes, but no memory
address error. Too dark to do anything today.

Built a new mother board with different bus pull ups. That seems to have fixed the problem.
Running my test program now.
APE's drink 67304 Bottles of beer,232696 Bottles on the wall
Waiting for parts for final tweaking.
Rather than rebuilding a better version of this computer. now that I have it working I plan to move to
a 10/20/40 bit cpu and go to a hex display. Only the data path needs to go from 18 to 20 bits. This will be my
spring project.

Still a lemon, and buggy.
After working on the PCB for the 32 bit computer, the 9 bit bus transceivers came in.
The 36 bit instruction set is based on the 32 bit instruction layout. The max clock is 8 Mhz.
2 uS core, state decode timing 1970. Address and data lines are buffered now on the alu card.

The lemon lives. Stuffed the PCB and burnt the CPLD's. Front panel and halt works.
Need to revise software now.
Not sure how long I will stay with 18/36 bits. May move soon to a 20 bit version
after the 10 bit bus transceivers come in.

Not accessing the 6850 ACIA. thus no bootstrap. Bad ACIA or CPLD.
Giving up on 18 bits, Moving to a 16/32 bit CPU in the style of the late 60's
like the IBM 1130. Ordered a whole bunch of new parts for the new design.
Only CPLD's will be the ALU and 22v10's just for address decoding.
With no byte addressing memory and I/O cards will be simple.
Ben.

Now working on Komputer 69 a 16/32 bit computer, with a 12 phase clock.

That's a lot of clock phases! Have you a diagram or explanation?

That is a divide by 6 (ring counter) and a divide by 2 to give a 6502 style memory cycle.

Now with 10 states, and using chips I have off hand.
Yes the 16V8 I have on hand. Decodes the timing for the ring counter
and a 1200 bit baud rate at a 16 x clock. The memory card is mostly done.

The motherboard is out the door.