A 4.9152 MHZ clock seems the best cpu clock, as I wish for baud rate clock of 2.54 mhz.
~.8 uS for a memory cycle and .6 uS for a idle cycle.

Are you using a standard uart?

If the base clock is a high enough frequency it can be divided down for both the baud block and CPU clock and likely be accurate enough. Eg 25 MHz / 10.

As long as the baud clock is within about 3% (eg 1 part in 32) it is likely accurate enough.

Not sure just what kind of uart I am using yet,but less programing the chip better.
At the moment I am having a hard time finding 74ACT823's ( 9 bit d ff's).
I can program 22v10's for this but the pin out is different.
I may omit byte adressing, and just use 74ls574's.
Ben.
PS: Am omiting byte addressing, and using 74act574's,74act541's and 16v8's
for the data path.

Ordered parts from China. Looks like 6 pcb's, Control, Alu,Memory,IO,front panel and spare.
PCB size, 10 3/4 " x 5 3/4". A 34 pin ribbon cable will join the Control and Alu Card.
Ben.

Yes Ed, that 36 bit design is scrapped, due to board layout problems with a 1 4 bit and 2 16 bit alu's.
Now looking at a 48 bit wide cpu using 3 16 bit alu's, and byte wide buses.
Cards are now 12" 3/4 and 5" 3/4. New bus connectors have been pre-ordered. Opcodes same as the 36 bit cpu but just 12 more bits in the middle.
Ben.
PS:The original layout was for 4 x 9 wide bytes. With revised connectors, the 36 bit cpu is two connectors with 20 bit data and 16 bit data + control. Untill I do the PCB layouts, will I know what fits. Perhaps even a 40 bit cpu.

A 40 bit CPU, control logic is little cleaner than a 36 bit cpu, so I will go with that. 20 bit word addressing for now.
A 70's version would have 2 20 bit alu's and 20 bit wide data memory with 16k drams (32k/card)
from 1977. This version will use has 1 40 bit alu,and 1 40 bit memory card. ~5 cards total.
Software emulation is planned after get the schematics finished.
Ben.

I forgot I needed to write software. I better go back to a 36 bit CPU.
What emulater to use? IBM 7090,DEC PDP 10,HONEYWELL 6000.
Multics looks like a good choice, on the 6000.
Ben.

Have the rough version of the alu card done.10 x 6 inches, pcb unrouted.
Waiting for some switches to test for the font panel.
Ben.

I think I have all the parts I need for the front panel on order. Mouser seems be the only place that has the DS1830+ power reset device. Now I just need to check for the 8 bit wide stuff.

1ST draft done.

The alu card. PCB and schematics. Big chips the bitslices,
smaller chips the 8 bit data paths. 9.25" x 6.0" inches.
The motherboard/front panel needs to designed now. 9 hex digits
and some pushy buttons.
Ben.

Going for the Gold. The 3 cent computer, 40 bits 10.25" x 6.0"
Mother Board, 10.75" x 8.0"
Ben.
PS: added extra cap and power led.

Adding hardware byte operations at the moment looks very expensive in terms of layout, number of chips
and power cost. Software byte operations are looking at a 8 bit character, so I can pack 5 per word.

Rather than barrel shifting bytes, perhaps mask40 then or5 to narrow. Or split5, then mask40 to widen.

Never heard of those instructions, what do they do?
Rather than using ascii, any 5 bit codes out there that do upper/lower case/math?
Ben.

Not instructions, but gates...

Couldn't find positive OR with 5 inputs, AND5 NAND5 probably work as well.
Assume you already have ALU that can mask uninvolved bits before or after.

Baudot and ITA have no shift or caps-lock, but could maybe repurpose the bell?
With a timeout to assure it don't CAPSLOCK IN THE WRONG STATE ETERNALLY.
Bell twice makes no capslock sense, but could ring if alarm was essential.
Qty5 of 74F30 NAND8 to merge...

Software is plenty fast enough for human read output, but consider also:
Interpreter, Compiler, Sort, Search, Paths. Is soft fast enough for those?
Baudot in alphabetical or subset of ASCII re-order might help too.