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 EPiC - A new 68k multi-processor motherboard project 
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Joined: Tue Jun 03, 2014 2:40 pm
Posts: 127
I know I just said I was putting this project on hold, but I have one more thing. I've found this CPLD for a possible address decoder/glue logic chip in the 68060 build. Does it look suitable to you guys?


Tue Apr 14, 2015 7:57 pm
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Joined: Wed Jan 09, 2013 6:54 pm
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It has a 7.5ns propagation delay - that's probably too slow for your mentioned target speed of 100MHz. Although, it just might be fast enough to raise a wait state signal. I'm not sure if it's possible to build a zero-wait-state memory at 100MHz anyway. I note you want to use PC133 SDRAM, so that's 133MHz, which means a shade over 7.5ns period. Do you have a handle on the SDRAM signal timings?


Tue Apr 14, 2015 8:03 pm
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BigEd wrote:
It has a 7.5ns propagation delay - that's probably too slow for your mentioned target speed of 100MHz. Although, it just might be fast enough to raise a wait state signal. I'm not sure if it's possible to build a zero-wait-state memory at 100MHz anyway. I note you want to use PC133 SDRAM, so that's 133MHz, which means a shade over 7.5ns period. Do you have a handle on the SDRAM signal timings?


I should have mentioned another little update to the project: I learned that the entire PCxxx series of memory is set up to use a 64-bit data bus, so half the bandwidth would go unused without fancy memory controlling. Instead of PC100 or PC133, I'm considering moving to the 32-bit wide 72-pin SIMMs for the system RAM. Granted they're slower, but as was pointed out before, the 060 has a fairly sizable cache which should negate some of the penalty of going this route. Of course that entails using an additional CPLD programmed as a RAM controller, but that's a bridge to cross at a later date.


Tue Apr 14, 2015 9:55 pm
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I've updated the project's design goals in the original post to eliminate the SD and MMC card slots (these can be added later via an add-on card or USB adapter), increased the ROM size and dropped the 68EC060RC75 in favor of the 68060RC75 to gain hardware-level memory protection.


Thu Apr 16, 2015 7:37 pm
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I've been doing some more in-depth reading in the MC68060 manual, and learned a few interesting little tidbits. First, there is no such thing as an MC68060RC75 - the only 75MHz versions of this processor are the LC and EC models. So much for my previous post, eh? With this news, I'm once again up in the air about which CPU to go with. Some pros and cons:

Pros:
68060: Complete version with MMU, FPU, everything you could possibly need.
68LC060: Fastest version made runs at 75MHz, but has successfully been run at 80 MHz with no issues.
68EC060: Fastest version made runs at 75MHz, but rumored to be even more easily overclocked without causing a thermal nightmare, making 100MHz within reach. Commonly available at very reasonable prices.

Cons:
68060: Fastest version made runs at only 66MHz instead of 75.
68LC060: Harder to find and insanely expensive, around $650 per chip. No MMU may be an issue for protected memory.
68EC060: Again, no MMU.



Even though there is no MMU in the LC and EC, Appendix B of the manual states:

"Although the MC68EC060 has no paged MMU, the four TTRs (ITT0, ITT1, DTT0, and DTT1) and the default transparent translation (defined by certain bits in the TCR) operate normally and can still be used to assign cache modes and supervisor and write protection for given address ranges. All addresses can be mapped by the four TTRs and the default transparent translation."

Contrast that with the info found in section 4 regarding the MMU:

"The data transparent translation registers (DTTR0 and DTTR1) and instruction transparent translation registers (ITTR0 and ITTR1) are 32-bit registers that define blocks of logical address space that are untranslated by the MMU (the logical address is the physical address)."



I could care less about paging, but protected memory is still really high on my wish list. However, I don't see how these TTR registers can be used for memory protection when it seems all they do is control whether addresses are translated or not. What am I missing here?

I'm still doing some reading, so I may answer my own question eventually, but if there are any experienced Motorola guys following along, maybe one could point me in the right direction?


Mon Apr 27, 2015 6:03 am
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Joined: Tue Jun 03, 2014 2:40 pm
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Ok... I think I answered my question with a little research and reading.

The EC model retains four registers needed to restrict access to regions of memory in 16 meg chunks. Good enough for me! I think I can work with that. On that note, the project is back to using the 68EC060. So far as clock speed, EPiC will support a variety of frequencies, all configurable on-the-fly.


Wed Apr 29, 2015 3:18 pm
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Joined: Tue Jun 03, 2014 2:40 pm
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Wow... long time no post, eh? Despite how it may seem (over a year with no posting?? Shame on me!) this project has not died yet. :D

So what have I been doing with the spare time I've had in the past year?

-Familiarized myself with PIC microcontrollers (and started work on a PIC PS/2 interface, should be done in the coming months)
-Read certain parts of the 68060 manual like a New York Times bestseller.
-Revised the specs yet again (and again, and...)
-Learned a little about 68060 bus timing (I may be able to make do with slower memory than I previously thought!)
-Sourced a relatively cheap '060! Now to wait not-so-patiently for delivery...
-Entered into talks with a local PCB manufacturer and their preferred design/layout person to start work on the breakout board

Hope everyone here is doing well! :)

[/checkin]


Last edited by mercury0x000d on Fri May 27, 2016 4:40 pm, edited 1 time in total.



Fri May 27, 2016 4:35 pm
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Joined: Wed Jan 09, 2013 6:54 pm
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Welcome back! I checked the dates, and thought you'd been gone a week. But it was more like 53 weeks in reality..


Fri May 27, 2016 4:40 pm
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Joined: Tue Jun 03, 2014 2:40 pm
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BigEd wrote:
Welcome back! I checked the dates, and thought you'd been gone a week. But it was more like 53 weeks in reality..


Ehh, a week, a year and a week... same difference, right? :D

Thanks for the welcome! It's good to be back. :)


Fri May 27, 2016 8:47 pm
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Attachment:
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Lookie what arrived!


Fri Jun 17, 2016 3:39 pm
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What does the other side look like? Is it a PGA?


Fri Jun 17, 2016 4:19 pm
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Joined: Tue Jun 03, 2014 2:40 pm
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BigEd wrote:
What does the other side look like? Is it a PGA?


Attachment:
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Yep :)


Tue Jun 28, 2016 5:41 am
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Joined: Tue Jun 03, 2014 2:40 pm
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I've got the ZIF socket arriving tomorrow, and I met with the board layout designer last week. He's made something super nice looking for a breakout card! I have to review the details of it (there's a couple weeks, given my schedule :() and get back to him to finalize, then it's off to the fab house for production. Once the breakout is assembled, I can start working on probing the behavioral details of the 68060. :D


Tue Jun 28, 2016 5:46 am
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Looks like it's 5V compatible too - that's good!


Tue Jun 28, 2016 7:27 am
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Joined: Tue Jun 03, 2014 2:40 pm
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BigEd wrote:
Looks like it's 5V compatible too - that's good!


Yeah! I'd like to run the whole system at 3.3V for simplicity, but I may need that 5V compatibility in the end.


Wed Jun 29, 2016 1:04 pm
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