AnyCPU
http://anycpu.org/forum/

EPiC - A new 68k multi-processor motherboard project
http://anycpu.org/forum/viewtopic.php?f=23&t=135
Page 6 of 18

Author:  mercury0x000d [ Tue Jul 08, 2014 1:49 pm ]
Post subject:  Re: EPiC - A new 68k multi-processor motherboard project

Lots of good ideas! Initially, I was thinking of the adapter having a male header on a small horizontal board at the bottom to directly plug into the breadboard, then having a vertical board mounted atop it to hold the processor, sort of like an inverted "T" shape. However, since this leads to a number of difficulties, I've narrowed it down to one of the two designs which I've attached below. I think adapter #2 will work better and lead to an easier breakout, but the first would be easier to tie into a project. What do you guys think?

Attachments:
68060 adapter 2.jpg
68060 adapter 2.jpg [ 167.8 KiB | Viewed 8588 times ]
68060 adapter 1.jpg
68060 adapter 1.jpg [ 147.59 KiB | Viewed 8588 times ]

Author:  mercury0x000d [ Tue Jul 08, 2014 2:28 pm ]
Post subject:  Re: EPiC - A new 68k multi-processor motherboard project

For a direct pga-to-dip adapter, this is the reply I got:

"We can make just one, but the per unit cost to make 12 or more would be a lot cheaper if you have use for more. There is a fair bit of design time involved in a PGA to DIP adapter with that many pins, and it will require at least a 4 layer PCB, and a special surface mount PGA socket. For budgetary purposes, I would estimate a single adapter to cost around $1000, with 2-3 week lead time. If you needed 12 or more, the cost would be a lot less per unit, somewhere around $200."

$1000.00?!? :shock:


Do you guys think it would really have to take a 4-layer PCB?

Author:  BigEd [ Tue Jul 08, 2014 2:46 pm ]
Post subject:  Re: EPiC - A new 68k multi-processor motherboard project

I would say for affordability it would have to be a 2-layer PCB! But note that this will be more of a challenge from a signal integrity point of view.

I think a group buy is a big win for PCBs - you can get 6 or 10 made up for not much incremental cost, so the value is much better.

Ed

Author:  mercury0x000d [ Tue Jul 08, 2014 2:58 pm ]
Post subject:  Re: EPiC - A new 68k multi-processor motherboard project

BigEd wrote:
I would say for affordability it would have to be a 2-layer PCB! But note that this will be more of a challenge from a signal integrity point of view.

I think a group buy is a big win for PCBs - you can get 6 or 10 made up for not much incremental cost, so the value is much better.

Ed


Agreed! I think this could be done on two layers, with a little effort. I'll create a mockup and post it for review.

Author:  mercury0x000d [ Tue Jul 08, 2014 3:53 pm ]
Post subject:  Re: EPiC - A new 68k multi-processor motherboard project

Also - total noob question here - but when you say "two-layer PCB," is that basically the top and bottom of one single board? Or does that mean two individual boards with traces on one side of each sandwiched together?

Author:  BigEd [ Tue Jul 08, 2014 4:00 pm ]
Post subject:  Re: EPiC - A new 68k multi-processor motherboard project

Top and bottom

Author:  Garth [ Tue Jul 08, 2014 5:35 pm ]
Post subject:  Re: EPiC - A new 68k multi-processor motherboard project

If they're doing the design work, going for four layers may cut the design time down more than enough to compensate for the tool-up cost difference between a two-layer board and a four-layer. You really need one layer to be a ground plane, leaving you only one to route signals if you go with only two layers. Putting four rows of pins at one end (rather than a row at each of the four sides of the socket) would be harder to route, especially in two-layer. Whoever does the layout needs to know which pins are ground. Decoupling capacitors should also be put close to the IC.

Author:  mercury0x000d [ Tue Jul 08, 2014 5:41 pm ]
Post subject:  Re: EPiC - A new 68k multi-processor motherboard project

Garth wrote:
If they're doing the design work, going for four layers may cut the design time down more than enough to compensate for the tool-up cost difference between a two-layer board and a four-layer. You really need one layer to be a ground plane, leaving you only one to route signals if you go with only two layers. Putting four rows of pins at one end (rather than a row at each of the four sides of the socket) would be harder to route, especially in two-layer. Whoever does the layout needs to know which pins are ground. Decoupling capacitors should also be put close to the IC.


Another total noob question... :oops:

When you say "ground plane" I'm guessing you mean one whole layer or side of the PCB used strictly for ground connections only? If that's correct, then one could also put anything to be permanently grounded (like DTACK or any other signals) on this plane, right? Or is it reserved solely for power connections?

Author:  Garth [ Tue Jul 08, 2014 6:33 pm ]
Post subject:  Re: EPiC - A new 68k multi-processor motherboard project

mercury0x000d wrote:
When you say "ground plane" I'm guessing you mean one whole layer or side of the PCB used strictly for ground connections only?
Yes. It's not just for the connections though. The ground return current for any signal line flows not across the shortest path, but under the signal trace, taking the shape of that trace. This makes for the lowest inductance, lowest unwanted coupling between traces, lowest vulnerability to electromagnetic radiation, etc.. To make it work best though, there need to be lots of ground pins well distributed in the IC's array of pins, and in your pins to the world outside the adapter as well.

Quote:
If that's correct, then one could also put anything to be permanently grounded (like DTACK or any other signals) on this plane, right?
Yes.

Quote:
Or is it reserved solely for power connections?
No.

Author:  mercury0x000d [ Tue Jul 08, 2014 6:45 pm ]
Post subject:  Re: EPiC - A new 68k multi-processor motherboard project

So you're saying - using the 68000 as an example - I would run the ground connections to the chip on the ground plane, run the positive power connections on the main side of the board, then I should also add grounded traces to the ground plane (which physically connect to nothing except ground) directly under all the positive power and signal traces (like DTACK, VPA, BGACK, the address and data busses, etc.) on the main side of the board?

Well, gee... this board just got a lot harder lol

Author:  Garth [ Tue Jul 08, 2014 7:05 pm ]
Post subject:  Re: EPiC - A new 68k multi-processor motherboard project

The ground plane is a continuous plane. It should not have traces cut into it. However, even though it's like a piece of .0014"-thick sheet metal (if it's 1-ounce copper), the return current path through the ground plane will still take the shape of the signal traces above (or below) it. That's just the way the physics works, because of mutual inductance. Being careful about these things will be far more important for a 68060 than for a 68000 though, because the 68000 was never made nearly as fast AFAIK.

Author:  mercury0x000d [ Tue Jul 08, 2014 8:03 pm ]
Post subject:  Re: EPiC - A new 68k multi-processor motherboard project

Oh, I see. So it's basically just a solid layer of copper designed to let the stray interference return to ground instead of jumping to other neighboring traces. I did a little reading on this and from what I gather it seems there should be layers as follows: the component (silkscreen) side, then the insulated board, then a middle ground plane (one big piece of copper connected only to ground), then another insulated board, then the circuit layer where the component leads stick out and the soldering is done. Is that about right?

Author:  Garth [ Tue Jul 08, 2014 8:36 pm ]
Post subject:  Re: EPiC - A new 68k multi-processor motherboard project

mercury0x000d wrote:
Oh, I see. So it's basically just a solid layer of copper designed to let the stray interference return to ground instead of jumping to other neighboring traces.


You might have been reading about what happens in high-impedance, low-frequency (like audio) work, where capacitive coupling is the major thing.

High-speed digital is low-impedance, and the inductive aspect is the greater concern. A signal line conducting current sets up a magnetic field around it. If the current level rises quickly (as is needed in high-speed digital's fast edges), the quickly changing electromagnetic wave surrounding it goes out, and, as it cuts through other lines, it induces a voltage in them. This magnetic field is kind of like inertia too though, and it makes it harder to quickly raise or lower the current in a conductor. There is an exception. If the ground plane is right there under the line, the magnetic field makes an equal current flow in the opposite direction, as close as possible to the signal line, and it kind of "shorts out" the magnetic field, making it easier for the signal line because a magnetic field does not have to be built up. This is the effect of mutual inductance. It makes it easier to get the fast rise times and also prevent overshoot; and since every signal current has its return current super close to it, the area around is quiet. By the same token, the pair becomes more immune to electromagnetic fields from outside too, because it is acting as a balanced pair.

Quote:
I did a little reading on this it seems there should be layers as follows: the component (silkscreen) side, then the insulated board, then a middle ground plane (one big piece of copper connected only to ground), then another insulated board, then the circuit layer where the component leads stick out and the soldering is done. Is that about right?

If you can make all the connections on a single layer, you can get away with just two layers, and the ground plane can be the solder side if desired, and then thru-hole parts still get soldered on the back. Thru-plated holes will make the connections between layers where appropriate and will wick up the solder in the soldering process. Actually, with SMT, the component side is forced to be a signal layer.

Author:  mercury0x000d [ Wed Jul 09, 2014 1:38 am ]
Post subject:  Re: EPiC - A new 68k multi-processor motherboard project

Okay, I think I'm starting to get it... a little, anyway lol

One other thing... on the attached pinout, whats the difference between EVDD and IVDD? And I thought (according to this) that VDD was positive and VSS was negative? Why do they list them in the text in the middle together as if they're the same thing?

Attachments:
68060 pinout.png
68060 pinout.png [ 50.63 KiB | Viewed 8537 times ]

Author:  Garth [ Wed Jul 09, 2014 2:30 am ]
Post subject:  Re: EPiC - A new 68k multi-processor motherboard project

I can't find anything at all in the data sheet telling what these are, that is, what the difference is between EVDD and IVDD which would be power, and EVSS and IVSS which would be ground.

Page 6 of 18 All times are UTC
Powered by phpBB® Forum Software © phpBB Group
http://www.phpbb.com/