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 Z80 at gate level 
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Joined: Wed Jan 09, 2013 6:54 pm
Posts: 1370
Goran Devic has been building a Z80 for FPGA, aiming to implement at the gate level instead of the usual RTL level.

See various subpages at (broken: see now
and code at

(And see also relevant writeups by Ken Shirriff of his own findings on the Z80 internals: - Goran started his project on his own but is now following Ken's/visual6502's progress too.)


Last edited by BigEd on Mon Sep 10, 2018 5:23 pm, edited 1 time in total.

fix broken image link

Tue Oct 14, 2014 1:16 pm
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