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 Thor Core / FT64 
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Joined: Sat Feb 02, 2013 9:40 am
Posts: 920
Location: Canada
Started porting the code updates from nvio back to FT64. There were a lot of changes in the past couple of weeks so there’s a lot to update. While FT64 remains basically a 64-bit machine, floating-point will use double-extended or 80-bits precision. That means wider internal busses. The core will also be altered to use address generators rather than the alu’s to generate addresses.
The implementation language is being switched to System Verilog. Newer versions of files are .sv files.

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Robert Finch http://www.finitron.ca


Sun Jun 16, 2019 2:54 am
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Joined: Sat Feb 02, 2013 9:40 am
Posts: 920
Location: Canada
Got the data cache and write buffer ported back and widened the internal busses. Then ran a simulation to confirm nothing was broken.

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Robert Finch http://www.finitron.ca


Mon Jun 17, 2019 3:17 am
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Joined: Sat Feb 02, 2013 9:40 am
Posts: 920
Location: Canada
Improved some of the documentation for FT64. Working on the NVIO doc I realized that there was a better way to organize the book. The instructions are described by functional unit rather than all being lumped together.

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Robert Finch http://www.finitron.ca


Tue Jun 18, 2019 4:06 am
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