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 CSCvon8: 8-bit TTL CPU 
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Joined: Wed May 15, 2019 1:17 am
Posts: 21
Hi all, I'm new to the board. I've been working on an 8-bit microcoded TTL CPU made with 17 chips: CSCvon8. Full details are at https://github.com/DoctorWkt/CSCvon8/. So far I've breadboarded it and I'm waiting for the PCBs to arrive.

32K RAM, 32K ROM, single UART, comes with an assembler and a compiler for a primitive C-like language. There's also some example programs, a KiCad schematic and PCB design, and a Verilog model.

This is a follow-up to my CSCV2 CPU, a 4-bit TTL CPU made from 13 chips: https://github.com/DoctorWkt/CSCv2.

I'll post more notes here as things progress! Cheers, Warren


Wed May 15, 2019 1:25 am
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Joined: Wed Jan 09, 2013 6:54 pm
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Sounds interesting Warren - look forward to hearing more. And, welcome!


Wed May 15, 2019 7:40 am
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Joined: Fri Mar 22, 2019 8:03 am
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Location: Girona-Catalonia
Hi Warren,

I have read through your 8 bit CPU docs and I got interested by your implementation of the control lines, particularly what you described on the "Generating Rising Edges and Load Delays" section.

For what I managed to learn based solely on book readings (so this means that I'm totally naive on that) my current understanding is that in most cases all the control signals including the Load signals and the ALU ones, are all generated more or less simultaneously (excluding possible minor delay differences among them). Assuming no pipelining, the CPU logic has one entire clock cycle to decode, generate the control signals, and perform any ALU operations. Only at the end of the cycle, or particularly at the beginning of the next cycle, the registers are set with their new values as the next raising clock edge arrives.

If I understood well your approach, you update the registers in the middle of the clock cycle instead, at the clock falling signal, as opposed to doing so at the end of the cycle. So in fact (always according to my understanding) the processor has nothing else to do for the remaining half of the cycle?. Is this how it works, or I am missing something?

Thanks,

Joan


Wed May 15, 2019 2:34 pm
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Joined: Wed May 15, 2019 1:17 am
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joanlluch wrote:
If I understood well your approach, you update the registers in the middle of the clock cycle instead, at the clock falling signal, as opposed to doing so at the end of the cycle. So in fact (always according to my understanding) the processor has nothing else to do for the remaining half of the cycle?. Is this how it works, or I am missing something?


Yes that's pretty much it. It might be better to say that the CPU has the whole duration of the clock cycle to get everything done before the next one starts. At 1MHz, that's 1000nS. In my design, I have several devices with delays like 45nS, 150nS, so I can't do everything on the rising clock edge: I need to let some devices propagate their outputs with a delay before I can use their output. So I negate the clock signal, clk_bar, and I perform some actions on the rising edge of clk_bar. This happens halfway through the clock cycle.

The most useful thing I did with this design is to model all the TTL chips in Verilog and model the propagation delays. I could then simulate the design, see the waveforms and understand why things were not working.


Thu May 16, 2019 12:41 am
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Joined: Wed May 15, 2019 1:17 am
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Status update: my PCBs arrived last night. I've added the microsequencer chip and the 555 pulse circuit (for manual clocking) and they work. This morning, I've added the PC, the IR, the Instruction ROM and the microinstruction (Decode) ROM. I've just been able to run my first instructions: copy from ROM across the data bus and send to the UART.

In other words, I've been able to print my own name out. Here's a photo of the PCB so far:

Image

The only flaw so far is that I didn't realise that the UM245R UART has the USB port at the bottom and not the top. So it faces downwards (where the word UART sits above uSeq in the photo) instead of towards the top edge. If that's the only problem, I'll be happy.


Last edited by DoctorWkt on Fri May 17, 2019 9:05 am, edited 1 time in total.



Fri May 17, 2019 2:18 am
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Joined: Fri Mar 22, 2019 8:03 am
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Location: Girona-Catalonia
Hi Warren,
It looks fantastic! Two questions:
- Who made the PCB for you? In the past, I used the “jlcpcb” online services for a small project, (just a 40x60 mm board with a couple of small relays) and found their quality and prices great. Just as a matter of curiosity.
- What do you use as the UART? I looks like one of these pre-made accessories that you can buy from China portals or Amazon... I would like to know more on that. Also, how do you use it to interface your CPU with the exterior world, for example in order to upload a program? What’s the procedure?

Thanks.


Fri May 17, 2019 5:31 am
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Joined: Wed May 15, 2019 1:17 am
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joanlluch wrote:
- Who made the PCB for you?
- What do you use as the UART? Also, how do you use it to interface your CPU with the exterior world, for example in order to upload a program? What’s the procedure?

I'm in Australia, and I used Breadboard Killer as their price for my boards (25cm x 9cm) plus postage was better than OSH Park. The boards were produced in Singapore. Minimum is 5 boards per order with Breadboard Killer.

The UART board is a UM245R. This has an FT245R UART on it, but it can support both 5V and 3.3V designs. The UM245R board can also supply 5V or 3.3V to the board; I'm using the 5V supply to power my components. It's a bit expensive, though.

The FT245R UART has an 8-bit tri-state bus for character I/O. There's a control line to receive a byte and another to send a byte. There are also two status lines: is a byte available to receive, is the UART ready to send a byte.

I'm only going to use one of my PCBs, so if someone wants one let me know. I'm happy to pass them on for a small fee + postage.

Interfacing with the rest of the world: Right now I'm just burning the Instruction ROM each time I want to test new instructions as I add more components to the board. Eventually I'll write a monitor ROM which can read & write RAM locations, download executables over the serial line and then execute them.

The CPU is so minimal that there is no stack, no real indexed instructions, so I think a BASIC in ROM might be out of the question.


Fri May 17, 2019 9:03 am
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Joined: Wed May 15, 2019 1:17 am
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Update: I've soldered everything onto the PCB, and I've built a clock daughterboard with a 555, variable resistor and swappable capacitor so I can adjust the clock rate. Right now it's around 20kHz. The CPU has passed a bunch of tests this morning, but I have a few more to try. Then I'll give the 1MHz oscillator a go. Latest photo:

Image

Edit: I put the 1MHz oscillator in and the board is running fine. I've also put in a 3.57MHz oscillator which should be above the limits of the design and it also works with just one tiny glitch: an extra output char just before UART input.


Fri May 17, 2019 11:37 pm
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Joined: Wed May 15, 2019 1:17 am
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I've had some fun debugging an issue with jump instructions. But I've found a workaround solution, so here is a video of the CSCvon8 CPU in action.


Fri May 31, 2019 10:05 am
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Joined: Wed Jan 09, 2013 6:54 pm
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Great choice of demo! (Conway's Game of Life)


Fri May 31, 2019 11:10 am
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Joined: Wed May 15, 2019 1:17 am
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I've just written up the notes on how to build the CSCvon8. I still have a few spare PCBs if someone else wants to try building it.


Sun Jun 02, 2019 2:54 am
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Joined: Fri Mar 22, 2019 8:03 am
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This is all very impressive, and it looks as a lot of work being done. I will definitely study your docs as I progress with my build, I have already picked an idea by just scrolling down your assembler source code, but the aspect I’m more interested about is the interface with the monitor through the UART. I have still a lot to learn on such kind of things, and so far I’m quite lost on many hardware related subjects. So what you just shared will be great help to me!


Sun Jun 02, 2019 8:17 pm
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Joined: Wed May 15, 2019 1:17 am
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Just an update. I was fighting a issue with my jump operations. I made one small wiring change and replaced the 74HCT251 with a 74HCT151. The design now runs solidly at at 3.57MHz. The CPU can now play Tic Tac Toe against a human and always win or tie. I've updated the Github repository with the changes, and there are some details build notes as well.


Fri Jun 07, 2019 10:59 pm
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Joined: Wed Jan 09, 2013 6:54 pm
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Great - and thanks for the build notes


Sun Jun 09, 2019 5:09 pm
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Joined: Tue Dec 18, 2018 11:25 am
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Location: Hampshire, UK.
@DoctorWkt; congratulations on your CSCvon8 getting a post in the Hackaday Blog.

https://hackaday.com/2019/06/23/a-ttl-cpu-minimising-its-chip-count/


Sun Jun 23, 2019 11:09 am
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