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| What is the OR_q register in OPC1? http://anycpu.org/forum/viewtopic.php?f=25&t=662 |
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| Author: | guidoism [ Sat Dec 21, 2019 10:03 pm ] |
| Post subject: | What is the OR_q register in OPC1? |
I'm attempting to go through each of these one page CPUs to try to understand them better but I can't for the life of me figure out what the OR_q register is supposed to stand for. Help? PC = program counter ACC = accumulator FSM = finite state machine IR = instruction register LINK = link register (not sure why this is called link) OR = ????? Operand Register? |
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| Author: | BigEd [ Sun Dec 22, 2019 8:44 am ] |
| Post subject: | Re: What is the OR_q register in OPC1? |
Welcome! And thanks for your interest in the OPC series. Yes indeed, it's the operand register. (Ref: https://github.com/revaldinho/opc/blob/ ... /opc5cpu.v) (As for the "_q" that's a naming convention to remind us that this signal is the output - the Q side - of a flop or a register made of flops.) |
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| Author: | Revaldinho [ Sun Dec 22, 2019 4:07 pm ] |
| Post subject: | Re: What is the OR_q register in OPC1? |
I think the name makes more sense in the very first OPC which is a true accumulator machine. Ih that version you need somewhere to hold the incoming operand from memory when performing any operation on two data words (with the other in the accumulator). The function of the operand register is similar for the other OPCs, in that it holds one of the two operands for an ALU operation immediately before execution. However, since those are all load/store type machines all operands are being taken from the larger register file, so really it's just a pipeline stage now. |
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