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My I/O Questions
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Joined: Tue Dec 11, 2012 8:03 am
Posts: 265
Location: California
It's generally two to the power of however many register-select inputs there are. Since the 6520 PIA has two (and I think the 6820 is the same thing), that makes for four addresses. That doesn't mean you have to give it only four addresses. You can give it a lot more (to make your address decoding hardware simpler) and just not use more than four. If you do give it more, the four you need will get reflected in other addresses; but if you don't use them, it does not cause any problems.

So let's say you put the PIA at \$6000. (I'm going by the 6520 PIA data sheet as I don't have a 6820 PIA data sheet.) You will use addresses \$6000 to \$6003. The PIA is slightly confusing because bit 2 of the control registers CRA (which is at \$6001) and CRB (which is at \$6003) alter the function of addresses \$6000 and \$6002 to determine whether you'll read and write the ports or their data-direction registers. So you have:
Code:
\$6000   If CRA<2> = 1, using this address will read or write port A
"     If CRA<2> = 0, using this address will read or write port A's data-direction register
\$6001   Using this address will read or write control register A (CRA).
\$6002   If CRB<2> = 1, using this address will read or write port B
"     If CRB<2> = 0, using this address will read or write port B's data-direction register
\$6003   Using this address will read or write control register B (CRB).

The 6522 VIA has four register-select lines, giving it sixteen addresses, and the data-direction registers have their separate addresses which makes code more efficient particularly when you want to emulate an open-drain I/O bit like for bit-banging the popular I²C two-wire synchronous-serial interface. Actually, the 6522 is much more capable than the 6520/6820 PIA, so I might nudge you just slightly if I can toward using that instead.

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Tue Nov 12, 2013 9:41 pm

Joined: Sat Aug 03, 2013 11:02 pm
Posts: 43
What type of chip would be good for an FDC. I ask because i am using and MPU that does not have an FDC I.C. in the family
http://en.wikipedia.org/wiki/Signetics_2650

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Wed Nov 13, 2013 3:48 pm

Joined: Sat Aug 03, 2013 11:02 pm
Posts: 43
Garth wrote:
It's generally two to the power of however many register-select inputs there are. Since the 6520 PIA has two (and I think the 6820 is the same thing), that makes for four addresses. That doesn't mean you have to give it only four addresses. You can give it a lot more (to make your address decoding hardware simpler) and just not use more than four. If you do give it more, the four you need will get reflected in other addresses; but if you don't use them, it does not cause any problems.

So let's say you put the PIA at \$6000. (I'm going by the 6520 PIA data sheet as I don't have a 6820 PIA data sheet.) You will use addresses \$6000 to \$6003. The PIA is slightly confusing because bit 2 of the control registers CRA (which is at \$6001) and CRB (which is at \$6003) alter the function of addresses \$6000 and \$6002 to determine whether you'll read and write the ports or their data-direction registers. So you have:
Code:
\$6000   If CRA<2> = 1, using this address will read or write port A
"     If CRA<2> = 0, using this address will read or write port A's data-direction register
\$6001   Using this address will read or write control register A (CRA).
\$6002   If CRB<2> = 1, using this address will read or write port B
"     If CRB<2> = 0, using this address will read or write port B's data-direction register
\$6003   Using this address will read or write control register B (CRB).

The 6522 VIA has four register-select lines, giving it sixteen addresses, and the data-direction registers have their separate addresses which makes code more efficient particularly when you want to emulate an open-drain I/O bit like for bit-banging the popular I²C two-wire synchronous-serial interface. Actually, the 6522 is much more capable than the 6520/6820 PIA, so I might nudge you just slightly if I can toward using that instead.

so if the CRA and CRB control things, and according to the 6821 datasheet they are controlled by CA1-CA2 and CB1-CB-2, how do i control the status of these control registers

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Wed Nov 13, 2013 4:01 pm

Joined: Tue Dec 11, 2012 8:03 am
Posts: 265
Location: California
I found a 6821 datasheet at http://www.pinballpcb.com/datasheets/Mot6821.pdf and it basically is the same thing as the 6520 whose sheet I was looking at yesterday. CRA and CRB stand for "control register A" and "control register B." They are registers. CA1, CA2, CB1, and CB2 are pins, not registers, and are intended to be handshake lines to control data tranfers on ports A and B, two handshake pins per port. The idea for use like on a parallel printer, where you write to the port for example, one line tells the printer, "I have new data for you," and the printer takes it and uses the other line to say, "Thanks. Got it. I'm ready for another byte." The functions can be controlled and status can be read by accessing register CRA or CRB, with particular attention to bits 0, 1, 3, 4, and 5 in those registers, according to page 10 of the data sheet referenced here. For most applications though, It is not mandatory that you use CA1, CA2, CB1, and/or CB2. The 6522 have these also, and I have only used them for other things.

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Wed Nov 13, 2013 8:17 pm

Joined: Sat Aug 03, 2013 11:02 pm
Posts: 43
Garth wrote:
It's generally two to the power of however many register-select inputs there are. Since the 6520 PIA has two (and I think the 6820 is the same thing), that makes for four addresses. That doesn't mean you have to give it only four addresses. You can give it a lot more (to make your address decoding hardware simpler) and just not use more than four. If you do give it more, the four you need will get reflected in other addresses; but if you don't use them, it does not cause any problems.

So let's say you put the PIA at \$6000. (I'm going by the 6520 PIA data sheet as I don't have a 6820 PIA data sheet.) You will use addresses \$6000 to \$6003. The PIA is slightly confusing because bit 2 of the control registers CRA (which is at \$6001) and CRB (which is at \$6003) alter the function of addresses \$6000 and \$6002 to determine whether you'll read and write the ports or their data-direction registers. So you have:
Code:
\$6000   If CRA<2> = 1, using this address will read or write port A
"     If CRA<2> = 0, using this address will read or write port A's data-direction register
\$6001   Using this address will read or write control register A (CRA).
\$6002   If CRB<2> = 1, using this address will read or write port B
"     If CRB<2> = 0, using this address will read or write port B's data-direction register
\$6003   Using this address will read or write control register B (CRB).

The 6522 VIA has four register-select lines, giving it sixteen addresses, and the data-direction registers have their separate addresses which makes code more efficient particularly when you want to emulate an open-drain I/O bit like for bit-banging the popular I²C two-wire synchronous-serial interface. Actually, the 6522 is much more capable than the 6520/6820 PIA, so I might nudge you just slightly if I can toward using that instead.

So going off this example:
Code:
LDAA   %00000001
STAA   \$6001

LDAA   #\$FF
STAA   \$6000

Will this successfully write FF to port A

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Thu Jan 23, 2014 1:27 pm

Joined: Tue Dec 31, 2013 2:01 am
Posts: 100
Location: Sacramento, CA, United States
James_Parsons wrote:
So going off this example:
Code:
LDAA   %00000001
STAA   \$6001

LDAA   #\$FF
STAA   \$6000

Will this successfully write FF to port A

Not easy to predict, since we don't necessarily know the contents of direct page location %00000001, which is what you are transferring to the control register.

If you want to store the value %00000001 into the control register, you should 'ldaa #%00000001'.

Mike

Thu Jan 23, 2014 3:01 pm

Joined: Sat Aug 03, 2013 11:02 pm
Posts: 43
oops! :O Will it work besides my little mess up there

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Thu Jan 23, 2014 4:01 pm

Joined: Tue Dec 11, 2012 8:03 am
Posts: 265
Location: California
Here's what I get from page 10 of the http://www.pinballpcb.com/datasheets/Mot6821.pdf data sheet link you gave above:
1. Bit 0 (ie, the bit whose value is 1, the number you put in your first line) has to do with enabling interrupts caused by an active edge on CA1; so that's not what you want right now.
2. The CRA<2> that I mentioned above will be set with %00000100, not %00000001. Actually though, unless you know for sure that all the other bits in CRA are 0 and you want to keep them that way, it would be better to use an instruction (or sequence of instructions) that sets only that bit and leaves the rest unaffected. I won't take the time to look up the 6800 instruction set right now, but it might require loading CRA (address \$6001 in your case) into the accumulator, ORing %00000100 into it, then storing it back.
3. After that, your LDAA #\$FF, STAA \$6000 will make port A's output bits to reflect \$FF, provided you have already set the data-direction register so all port-A bits are outputs.

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Thu Jan 23, 2014 6:47 pm

Joined: Tue Dec 31, 2013 2:01 am
Posts: 100
Location: Sacramento, CA, United States
Garth wrote:
Here's what I get from page 10 of the http://www.pinballpcb.com/datasheets/Mot6821.pdf data sheet link you gave above: ...

Thanks for looking that up for me, Garth. A quick anecdote: I remember that the little proto-board project that I did with the 65802 about 27 years ago (!) used some kind of PIA, and it was simpler for me to wire up the two with the data lines reversed. The CPU and PIA didn't seem to mind at all, but my software (firmware) had to load the bit masks reversed as well. You won't find that on a data sheet!

Mike

[Edit: I dug it out and had my co-worker take a picture of its long-dead corpse. The eight gray wires between the CPU and the PIA near the middle of the board are visible. In fact, IIRC, the SRAM is (harmlessly) connected with reversed data and/or address buses as well. The '802 was swapped into my Apple II+ many years ago, and the '02 mounted here came from that same Apple:]
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Thu Jan 23, 2014 7:31 pm

Joined: Tue Jan 15, 2013 5:43 am
Posts: 180
Quote:
it was simpler for me to wire up the two with the data lines reversed [...] You won't find that on a data sheet!
Cool -- so you have d0 on one IC connected to d7 on the other, d1 to d6, and so on? I like how you fixed it in software! (An alternative solution -- besides a jumble of jumpers on top of jumpers -- would be to redefine the pinout by turning the chip upside down, and then bending the pins around or soldering to some sort of adapter. Offhand, I'd say you made the right choice!)

Speaking of vagaries of VIA usage, this computer (my KimKlone) has opcodes that talk to one of a VIA's 16-bit counters, rendering it part of the programming model.

Moreover, I needed the counter to increment, not decrement-- again, something you won't find on the data sheet! So, I used an inverting bus tranceiver (74HCT640) to connect it to the rest of the system.

-- Jeff

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Fri Jan 24, 2014 5:49 pm
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