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 Intel 4001 
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Joined: Sat Aug 03, 2013 11:02 pm
Posts: 43
The 4001 ROM pinout goes as follows
d0| O0
d1| O1
d2| O2
d3| O3
vss| vdd
ph1| CM
ph2| P0
sync| RESET


I beleive on the 4002 RAM O0-O3 goto CM-RAM0-CM-RAM3 on the processor.
If so what are the O0-O3 for on the ROM. Are they for the I/O port, also what (if any) address decoding is necessary on a 4004 computer

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Wed Nov 06, 2013 3:02 pm
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Joined: Tue Dec 11, 2012 8:03 am
Posts: 285
Location: California
Have you found a data sheet on it? All I've seen is the pinout, and I suspect that it
  • has an address counter, and
  • every pulse increments the address internally.
  • If you want to increment by more than one position, you have to give it multiple pulses.
  • If you want to go back (to lower addresses), you have to reset the counter and pulse it up to the desired position.
It's not efficient, but with only 256 addresses anyway, it won't take too long.

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Wed Nov 06, 2013 8:00 pm
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Joined: Wed Apr 24, 2013 9:40 pm
Posts: 213
Location: Huntsville, AL
I don't have the data sheet here, but I do have it at home. If I remember I'll post it for you, or send you a link to where I found it.

I believe that the data is available from the Intel website, but there is also another website that has assembled and documenting a reverse engineering effort for the 4004 microprocessor like that performed by the Visual6502 team.

In my recollection, there are some I/O ports in the 4001/4002 ROM/RAM components of the 4004 system.

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Michael A.


Wed Nov 06, 2013 8:21 pm
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Joined: Wed Apr 24, 2013 9:40 pm
Posts: 213
Location: Huntsville, AL
You can find the datasheet for the entire Intel 4004 processor family on Wikipedia. The article is the Intel 4004 article, and the data sheet is found in the reference section as the MCS-4 datasheet.

The 4001 ROM has 4-bit I/O port whose direction control is mask-programmed when the program ROM is being made. The 4002 RAM has a 4-bit output port. The 4003 is a 10-bit cascadable shift register with parallel outputs and a serial input/output. The 4004 is the CPU. Addresses and data are transferred between the parts using a time multiplexed 4-bit bus. A SYNC pulse is used to synchronize the frame.

You can also find a number of original documents on bitsavers.org, including a programmer's manual.

Edit: Added links to the Wikipedia article, the MCS-4 datasheet, and the bitsavers.org MCS-4 repository.

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Michael A.


Thu Nov 07, 2013 5:14 am
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Joined: Wed Jan 09, 2013 6:54 pm
Posts: 1780
MichaelM wrote:
... there is also another website that has assembled and documenting a reverse engineering effort for the 4004 microprocessor like that performed by the Visual6502 team.

(FWIW: http://www.4004.com/)


Wed Nov 13, 2013 7:21 pm
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Joined: Sun Aug 04, 2013 9:02 pm
Posts: 23
The 4004 works on multiples on 8 clock cycles. The address bus is 12 bits wide so the first three cycles clock out one nybble each of the instruction address. Two cycles are used to read the opcode, decode and execute it. The last three cycles access memory to read or write data.

There are some instructions that take double length 16 cycles to complete.

Sync is an output that indicates the first cycle of an instruction so that the other chips can synchronise to the processor.


Sun Jan 12, 2014 10:54 am
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