View unanswered posts | View active topics It is currently Sat Jul 04, 2020 2:18 pm

Reply to topic  [ 1 post ] 
 GRVI Phalanx - 500 very small RISC-V CPUs on an FPGA 
Author Message

Joined: Wed Jan 09, 2013 6:54 pm
Posts: 1419
From Hacker News:
Jan Gray stuffed 400 RISC-V cores into a Xilinx Kintex UltraScale KU040 FPGA

Slides: ... rkshop.pdf
GRVI is an FPGA-efficient RISC-V RV32I soft processor core, hand technology mapped and floorplanned for best performance/area as a processing element (PE) in a parallel processor. GRVI implements a 2 or 3 stage single issue pipeline, typically consumes 320 6-LUTS in a Xilinx UltraScale FPGA, and currently runs at 300-375 MHz in a Kintex UltraScale

GRVI (“Groovy”)
Gray Research RISC-V RV*I
• Purpose: efficient parallel processing element.
• Scalar, 2-3 stage pipeline RV32I+- + MUL/Hopt
– 300-375 MHz (KU-2), 1.3-1.6? CPI
– ~320 6-LUTs
– ~1 “MIPS”/LUT

It's not quite a conformant RISC-V - some bits missing, some extra. But 320 LUTs is pretty good.

Compute-Cluster.png [ 75.49 KiB | Viewed 2755 times ]

Torus-Network-On-Chip.png [ 65.81 KiB | Viewed 2755 times ]

Thu Dec 22, 2016 10:51 am
Display posts from previous:  Sort by  
Reply to topic   [ 1 post ] 

Who is online

Users browsing this forum: No registered users and 1 guest

You cannot post new topics in this forum
You cannot reply to topics in this forum
You cannot edit your posts in this forum
You cannot delete your posts in this forum
You cannot post attachments in this forum

Search for:
Jump to:  
Powered by phpBB® Forum Software © phpBB Group
Designed by ST Software