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 [ 4 posts ] 
 Some thoughts on the Z80 and other microprocessors 
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Joined: Wed Jan 09, 2013 6:54 pm
Posts: 1430
I was reading one of a short series of personal takes on the history of some well-loved microprocessors - see full list below - and mulling over comments on the Z80. One thing about the Z80 which is difficult for those familiar with the 6502 (and its spiritual antecedent, the 6800) is that the micro is clocked much faster than the memory. It's not the case that a 4MHz Z80 has four times the performance of a 1MHz 6502, although these were widely encountered as the standard speeds of the respective part. But neither is it that case that the performance difference exactly tracks the memory speed (it takes 3 ticks of the Z80 clock for a memory access cycle.)

So here's my thought, in the hypothetical situation of designing a Z80 as a successor to the 6502:
- the 6502 aimed to be an incremental improvement on 6800 and hit a lower price, so it's smaller and simpler. It keeps up performance by being more cycle-efficient.
- the Z80 had a larger transistor budget and could reach higher clock speed, but had only the same memory bandwidth. What to do? Have more registers, to decrease memory traffic, and a more complex instruction set, to make more use of each byte fetched.

Similarly, we can view the ARM design as a reaction to needing to design a very simple machine, therefore a simply-decoded instruction format with fixed length instructions, and to make maximum use of memory bandwidth by having lots of registers. (It also has a feature of making good use of faster access for sequential addresses.)

Anyhow, here are the articles, written by 'litwr' who is a (silent) member here:

Fri Jan 04, 2019 5:40 pm

Joined: Thu Mar 08, 2018 10:24 am
Posts: 4
The 6800 and 6502 are very different chips. The 6800 has two accumulators and full support for signed arithmetic but it has only one index register, poor addressing modes and it works slower with memory than the 6502. The 6800 uses Big Endian byte order and the 6502 Little Endian.
IMHO If the 6502 could support wait states then we could add 6 bytes data cache (as for registers of 8080/8085/Z80 B,C,D,E,H,L) for it and a prefetch instruction queue for about 4 bytes. For the memory access we can provide a burst mode. Such enhanced 6502 @4MHz could use memory @1MHz and provide performance maybe about the Z80 @10MHz. The belated z80 upgrade the Z800/Z280 which appeared only at 1986 uses 256 bytes cache and the mentioned burst mode... Maybe the R800 has even larger cache.
The Z80 has only several actually powerful instructions like LDIR. The similar instructions were added for the 68516. The 6502 has more complex addressing modes than the z80. However several z80's instructions can be a real challenge for implementations in RISC-like one clock timing.
IMHO it is much easier to design the super-6502 compatible with the 6502 but 5-7 faster at the same frequency. We need to move zero page into a register file and widen the data bus. The latter allows to use pipelining. Indeed we also need to use cycle optimization like it was done at the 4510.

Last edited by litwr on Mon Jan 07, 2019 8:47 pm, edited 2 times in total.

Mon Jan 07, 2019 7:38 pm

Joined: Wed Jan 09, 2013 6:54 pm
Posts: 1430
Good to hear from you! My thinking on the 6502 as a successor to 6800 is that the MOS team came directly from the 6800 team in Motorola and that the 6502 chip floorplan bears quite a resemblance to the 6800. So, the team as a whole took some of their knowledge with them, and wanted - indeed needed - to make something "better" than the 6800. You are of course right that the architecture and instruction set of 6502 takes some different directions from the 6800. The pin-compatibility of the 6501 is another aspect, which justifies making a close comparison.

It would be interesting to consider a 6502 which uses more transistors to improve performance - as you say, some tiny data cache and/or instruction buffer might make quite a difference. But I think the microarchitecture would need to be quite different to make use of the facilities, so we'd be talking about a full re-implementation and not just a tweak. My feeling is that the 6502 team didn't have the deep understanding of computer architecture to be able to do this. Indeed, very few people would, at that time, and they probably worked for IBM.

Mon Jan 07, 2019 8:16 pm

Joined: Thu Mar 08, 2018 10:24 am
Posts: 4
I don't think that making a better 6502 is so difficult. The mentioned Z800/Z280 implemented the bust mode, a higher clock frequency for CPU than for memory. For example, the R800 in the MSX TurboR works at 28 MHz but uses 7 MHz when accessing memory. The z80 has much more instructions that 6502 and it makes their fast realization very difficult. It can be easier for the 6502's ISA. IMHO just moving ZP to a register file gives about 2 times performance boost.
[6501] It is interesting for me that according to Bill Mensch's Oral History the idea of making 6501 more cheap and effective was rejected because it made minor incompatibility with the 6800's pin layout. IMHO they really teased Motorola a bit and got a reaction...

Tue Jan 08, 2019 10:06 am
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