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 An 8 bit TTL CPU in 16 chips: CSCvon8 
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Joined: Wed Jan 09, 2013 6:54 pm
Posts: 1316
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This very small CPU design implemented in TTL might be of interest, 8 bits and only 16 chips:

Image

See also Warren's previous tiny machine:
Warren’s Crazy Small CPU (4 bit machine, 11 chips)

Image

See also previously


Fri Apr 05, 2019 4:58 pm
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Joined: Mon Aug 14, 2017 8:23 am
Posts: 104
An interesting design - utilising heavily upon the availability of large ROMS

The ALU is implemented using a M27C322 2Mx16 bit EPROM and the decode logic is performed using a M27C1024 64K x 16 EEPROM.

https://processmodeling.org/theory/elec ... 27C322.pdf

This is in a 42 pin DIP and will require a special eprom programmer and adaptor socket to program - which may be a limiting factor to some home constructors.

The access time of the large ROM used in the ALU is 80nS which will be a limiting factor to the clock frequency. Similarly the decode logic ROM has at best a 45nS access time.

Nevertheless, the design shows how an 8 bit Von Neumann architecture can be implemented in a handful of TTL devices and four large memory chips.

The project detail, including devices used, instruction set etc can be found from this link:

https://github.com/DoctorWkt/CSCvon8/bl ... _design.md


Last edited by monsonite on Sat Apr 13, 2019 11:50 am, edited 1 time in total.



Sat Apr 06, 2019 9:20 am
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Joined: Wed Jan 09, 2013 6:54 pm
Posts: 1316
An interesting observation: not so many chips, but a great many transistors! Those are big EPROMs in impressively big packages.

Still, the principle of making moderately simple hardware and then putting the detail into a lookup table or in microcode is a good one, when those things are cheap.


Sat Apr 06, 2019 6:50 pm
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