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Scaled-index addressing mode http://anycpu.org/forum/viewtopic.php?f=3&t=681 |
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Author: | oldben [ Wed Mar 25, 2020 11:28 pm ] |
Post subject: | Re: Scaled-index addressing mode |
On may latest TTL cpu (8.16.32 bits) I have a free opcode slot, so I made that a prescaled addition axw a + (efa) << 1 -- add index word axh a + (efa) << 2 -- add index half (short) OPCODES: SUB ADD AND OR XOR (ADD INDEX) LD ST SIZE: BYTE(UNSIGNED)(8) SHORT(16) WORD(32) ADRESSING MODES 0..6 INDEXED 7 immedate(PC) if I limit myself to 1 meg adressing, all instructions are 1 world long except immediate long, witch is two words. |
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