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 Introducing the 65m32 

65m32: Stupid or neat?
Stupid 0%  0%  [ 0 ]
Neat 80%  80%  [ 4 ]
Undecided 0%  0%  [ 0 ]
65m32? 20%  20%  [ 1 ]
Total votes : 5

 Introducing the 65m32 
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Joined: Sat Feb 02, 2013 9:40 am
Posts: 920
Location: Canada
Do you build from the bottom up or top down ?

Vivado has a simulator built into the IDE so it’s possible to simulate the HDL code destined for synthesis directly. One doesn’t have to write one’s own cycle accurate simulator when the HDL code can be simulated directly. One can do things like dump the type of the bus cycle to the screen as literal text. I haven’t written a cycle accurate simulation yet, haven’t needed one. But I’m small time. I’ve been able to find all sorts of bugs using the toolset simulator. I have however written a couple of software ISA emulators. They are a very useful tool. It gets to be too cumbersome to use the simulator for debugging when millions of cycles are happening.

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Robert Finch http://www.finitron.ca


Tue Jan 10, 2017 6:18 am
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Joined: Tue Dec 31, 2013 2:01 am
Posts: 100
Location: Sacramento, CA, United States
robfinch wrote:
Do you build from the bottom up or top down ?

Are you asking me, Rob? I hesitate to call what I'm doing "building". I have a goal but no solid plan, so I'm just following my instincts to see how far I can get before I run out of time, energy or sanity, and have to give up or ask for professional help.

Mike B.


Tue Jan 10, 2017 6:31 am
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Joined: Wed Jan 09, 2013 6:54 pm
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robfinch wrote:
Do you build from the bottom up or top down ?

In industry, in my experience, definitely from the top down. That is, a CPU must be architected before it can be designed before it can be implemented.

That said, there have always been small specialist teams who build useful low level things: logic cell libraries, pad libraries, memories, PLLs. There will be low level expertise applied to the design of adders, multipliers and so on.

I do see that for some combination of sufficiently simple design and sufficiently clever designer it's possible to start with an idea and proceed to HDL, which can then be simulated as a way to explore the validity of the idea. I don't think the approach scales up well to complex designs and teams of people - it might be possible, but it has hazards.

The following is only tangentially relevant, but probably worth writing about somewhere...

As an anecdote, the T9000 project was a disaster. It was broadly architected, and then the design was handled by half a dozen teams of half a dozen people each. All the teams proceeded bottom up, and were not especially experienced. The management was inexperienced too. Each of the component parts had a unique design style and many cell libraries were used. Communication between the parts was one failure point. Timing closure within some parts was near impossible - scratch that, timing analysis was near impossible - and timing between parts was another failure point. We went through at least 8 revisions. The initial vision might have been 50MHz, the target was reduced to 30MHz and I think more, and when the thing eventually almost worked it was 10MHz or less, and several years late. It was much larger than it needed to be for the price point, and at various points was too large for the package and too large for the photoreduction optics.

Now, that project's failure is not necessarily applicable to all bottom-up design efforts! Many different things went wrong, and the tooling at the time was primitive and the computers (four microVaxes, a hundred or so transputers) rather limited too. Inexperience played a big part, and a lack of analysis and corrective action didn't help.


Tue Jan 10, 2017 8:37 am
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Joined: Tue Dec 31, 2013 2:01 am
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Location: Sacramento, CA, United States
barrym95838 wrote:
robfinch wrote:
Do you build from the bottom up or top down ?

Are you asking me, Rob? I hesitate to call what I'm doing "building". I have a goal but no solid plan, so I'm just following my instincts to see how far I can get before I run out of time, energy or sanity, and have to give up or ask for professional help.

Mike B.

My progress this year has been very spotty, due to a thousand distractions, but I have reached an important decision point. After coding many examples and analyzing the results, I have arrived at an inexorable conclusion: 32-bit words aren't quite wide enough for what I'm trying to do. I think I could make it work, but it just would feel a bit too constrained, and I wouldn't be 100% satisfied with the eventual results. Starting now, I'm going to put 65m32 development on hiatus and recycle almost everything I have done so far (many hundreds of hours of thinking and typing, spread over many years) into development of the 65m36. 36-bit word-addressed machines aren't exactly "main-stream", but neither am I, so I am cautiously optimistic that it could be a match made in heaven. Whether or not anyone else in the universe will be the least bit interested is open for discussion.

Mike B.


Tue Nov 21, 2017 8:28 am
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Joined: Wed Jan 09, 2013 6:54 pm
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It'll be interesting to see what happens with that - it's a word width with a history, of course:
Quote:
Computers with 36-bit words included the MIT Lincoln Laboratory TX-2, the IBM 701/704/709/7090/7094, the UNIVAC 1103/1103A/1105, the UNIVAC 1100/2200, the General Electric GE-600/Honeywell 6000, the Digital Equipment Corporation PDP-6/PDP-10 (as used in the DECsystem-10/DECSYSTEM-20), and the Symbolics 3600 series.
Smaller machines like the PDP-1/PDP-9/PDP-15 used 18-bit words, so a double word was 36 bits.


Tue Nov 21, 2017 9:05 am
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Joined: Sat Feb 02, 2013 9:40 am
Posts: 920
Location: Canada
Itanium has 41 bit instructions packed into 128 bits. I think it's not a bad idea to expand on the number of bits. 32 bit instructions are definitely cramped. I've worked on a couple of machine with 40 bit instructions as a result. 36 bits would probably work well with 9 bit bytes, putting a use to the parity bit available with some rams. 48 bit machines with 12 bit bytes also have some appeal. 10 bit byte machines could make use of six extra bits in a 16 bit word in order to do single bit error correction on the byte (SBDD).

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Wed Nov 22, 2017 1:38 pm
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