Hi All,
Since reading about the TTL VGA computer on Hackaday last November, it's designer Marcel van Kervinck assisted by friend Walter Belgers have released it as a nicely presented kit.
I purchased one of these kits - now known as the "Gigatron TTL Microcomputer" and spent an evening constructing it. There are 36 TTL ICs to solder - I chose to use turned pin sockets, plus a 64Kx16bit EPROM and a 32Kx8 SRAM.
The design uses 74HCT series logic - so is low power, and can easily be powered from a USB supply or USB port on a laptop.
The machine produces a 160 x 120 pixel VGA output in 64 colours - and there are some example programs/games provided. The overall look and feel is of the mid to late 70s - when the first TV and arcade video games appeared.
The design is a triumph of TTL minimalism. It uses standard TTL parts - such as multiplexers, decoders, registers and simple logic gates.
Whilst Marcel could have use the 74xx181 ALU - he felt that these chips are so rare now, that it would not make commercial sense. Instead he chose an ALU design promoted by Dieter Muller - based on eight 74xx153 multiplexers and a pair of 74xx283 4 bit adders.
If you enjoy elegant design - it's worth looking at this ALU design, as it could easily be used elsewhere with a little adaptation. Just five 16 pin packages will give you a 4-bit wide slice - capable of more than the old '181, and much cheaper.
Dieter's original article begins here
http://www.6502.org/users/dieter/Marcel's instruction set has only 8 instructions, ADD, SUB, AND, OR, XOR, LOAD, STORE and JUMP.
These are combined with 4 data sources, and 8 addressing modes - making a full 256 instructions. There are also 8 conditions available in the jump instruction.
The 8 bit instruction is held in the upper byte of the program ROM, allowing an 8-bit immediate data to be held in the lower byte.
The output of the ROM is held in an 8-bit Instruction Register and an 8-bit Data Register. A new instruction is fetched on every clock cycle - with the registers providing a basic pipelining method.
The program counter is just four 74xx161 counters, with control signals to load either the top byte or the bottom byte. This allows local jumps plus long jumps that cross page boundaries to be performed.
At the heart of the design is the control unit which decodes the various fields of the Instruction byte and generates the necessary signals to control the ALU, data source selector, conditional branch etc. Again, Marcel has reduced this to just six TTL parts, including 74xx138 and '139 for decoding the instruction, source and condition fields - and by using a ROM consisting of 30 diodes, generates the control signals for the ALU, registers and RAM access.
During the design exercise, Marcel kept a record of the equivalent number of gates used in the TTL devices. Not counting ROM, RAM or the input shift register, there is a remarkable low gate count of 930 basic gates.
VGA Generation
The microcomputer was designed to generate 1/4 VGA, and for this reason it has both an X counter and a Y register - to allow pixels to be efficiently accessed from RAM and output to a resistor network to provide a 6-bit VGA signal - plus the Hsync and Vsync. The use of an auto-increment X counter and [X,Y] addressing mode makes this easy in software. Smooth scrolling video, and other effects are possible in software.
16-bit Virtual Machine
Whilst this is an 8-bit Harvard machine, Marcel has written a 16-bit virtual (Von Neuman) machine interpreter that executes out of RAM. His interpreter is inspired by Wozniack's "Sweet 16" and is remarkably quick. It can interpret 34 primitive instructions - generally between 14 and 28 clock cycles long. The longest - a 16-bit ADD takes 28 cycles, which the stock machine executes in 4.48uS. I believe on a 1MHz 6502 this would be 20uS.
Overclocking
Whilst supplied with a 6.25MHz crystal - the machine will accept an 8MHz crystal and still produce VGA output that most modern monitors will sync to.
I have replaced most of the ICs in the ALU, instruction decoder and registers with 74Fxx series logic. This allows the machine to run on a 10MHz crystal, allbeit at the expense of extra operating current.
The machine uses a 100nS M27C1024-10F1 EPROM (or a pin compatible 45nS OTP AT27C1024) and a 55nS SRAM.
I'm taking steps to replace the RAM with a 10nS part, and hope to source a faster OTP ROM. It will be interesting to see just how fast this design can be pushed.
Here is a fascinating TTL processor made from low cost parts. (Average cost about $0.50 per package). It's supplied on a generously track spaced 6"x 9.5" 2 sided pcb in an attractive wooden case.
If, like me, you wanted a TTL cpu - but didn't want all the hard-work, this is an excellent starting point for your learning and experimentation.
Kits and further information from
https://gigatron.io/All ROM software on Github
https://github.com/kervinck/gigatron-rom