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 Octal computers 69+ 
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Joined: Mon Oct 07, 2019 2:41 am
Posts: 882
I did make a hardware change.Swap r with top of stack replaced a front panel operation.
Another milestone, I can boot the disc shell program with the file system.
Most of the hooks are in so I can write the shell soon.


Mon Nov 17, 2025 9:09 pm

Joined: Mon Oct 07, 2019 2:41 am
Posts: 882
Fixed a hardware bug. Tiny C programs now seem to work.
Prime number sieve in small C is about 25 seconds.


Wed Nov 19, 2025 12:51 am

Joined: Wed Jan 09, 2013 6:54 pm
Posts: 1863
Hurrah! That's quite the milestone.


Wed Nov 19, 2025 8:09 am

Joined: Mon Oct 07, 2019 2:41 am
Posts: 882
A bigger milestone today, a simple working shell. The catch was all the little details between routines.
The disc media, is still 70's size data at 8Mb per disc. The micro sd card is 128 Mb with 16Mb used.
About 1/2 way of my goal (software not documentation) of that of PDP-8 with disc and floating point.
Memory emulated is 6 cards of 16Kb ram and 1 8Kb rom card.


Sat Nov 22, 2025 12:34 am

Joined: Mon Oct 07, 2019 2:41 am
Posts: 882
Added 2 more instructions. BIT CARRY := (AC & Y) !=0 , EQV CARRY = !(AC $ Y).


Sat Nov 22, 2025 11:21 pm

Joined: Mon Oct 07, 2019 2:41 am
Posts: 882
Added ATX AC = AC + (Y<<1) for indexing.
Other wanting multiply and divide, I have finished the order codes.


Sun Nov 23, 2025 2:49 pm

Joined: Mon Oct 07, 2019 2:41 am
Posts: 882
Now that know my shell is under 1K, I can have more FAT space.
Yes we have now a 10 Meg hard-disk. 182 tracks * 6Kb per track (18bit data not 16bits) * 10 heads.
Send all your surplus top-loading washing machine sized drives here. :)
Any serial hardcopy devices also welcome.:) :)


Tue Nov 25, 2025 12:16 am

Joined: Mon Oct 07, 2019 2:41 am
Posts: 882
Fixed the halt instruction to halt at the correct spot. Back to 1 uS clock again, 12 Mhz osc. 1.8 uS memory cycle time
wanted. Back to overnight testing. Ordered some 13Mhz oscillators for January. ~ .93 uS.
Took a break and tried 18.432 Mhz. It works, ~ .875 or 1.75 uS, Ordered 17.73 Mhz osc, ~.90 uS


Tue Nov 25, 2025 6:11 am

Joined: Mon Oct 07, 2019 2:41 am
Posts: 882
Trying the fast version (74F219) chips. 650 ns cycle time, 1.3 uS memory cycle.


Tue Nov 25, 2025 7:01 pm

Joined: Mon Oct 07, 2019 2:41 am
Posts: 882
Playing around with different speeds. I plan to do a simple hardware timer with a 1200 hz base clock.
Testing a Cpu is 9.8 Mhz clock / 8. For now a ,725 uS cycle time with 7F219's will be the default for now
11 Mhz / 8.


Wed Nov 26, 2025 7:50 pm

Joined: Mon Oct 07, 2019 2:41 am
Posts: 882
Made a hardware change, inputting bit #3 from the bus.
Now have the Luna-tic version,changed swp to psh, and now have 16 registers rather than 9.
Addressing modes R% R+ R indexed and -R (push).
Last minute hack, 15 registers and relative branches and calls.


Sun Nov 30, 2025 10:27 pm

Joined: Mon Oct 07, 2019 2:41 am
Posts: 882
Found how to do open collector outputs so I now have simple real time clock.
Found a bug in the serial timing logic, a off by one count as I missed a gating term.
Then I had to play around until things worked again.
Moved the serial speed down to 1200 baud, so I can add a printer later with no hand shaking.
The only other feature hardware wise is to add DTR as a serial input,
ps: 3 AM edit. for a bit better logic.


Sat Dec 06, 2025 6:22 am

Joined: Mon Oct 07, 2019 2:41 am
Posts: 882
Had to move back to 2400 baud and change timing on the baud rate/timer logic for a faster clock.
Now at 2 mhz , for a 1 uS core cycle time.


Thu Dec 11, 2025 10:25 pm
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