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Joined: Sat Feb 02, 2013 9:40 am
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Location: Canada
Shoehorning in posit arithmetic functions into nvio v5. There is an empty row available in the instruction set where they could be placed. One issue is how to implement fused instructions. Because the posit fused dot product is required by the posit standard and instructions don’t have enough read ports, a macro instruction fused, fused dot product F2DP is going to be used. Generally, to use macro instruction fusion the processor must be able look at several instructions in the instruction stream to detect a macro fusion pattern. However, I want something simpler, so I’m looking at having the instruction set itself be encoded with indicators for macro fusion. That way the processor core shouldn’t need to pattern match on incoming instructions. There are a couple of extra bits available in instruction encodings to do this. So, there would be a bit in the instruction that says ‘this is the first half’ of a macro fused instruction and a bit for the second half. That way the core would know to feed the instruction to a fused unit in a simple fashion.

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Robert Finch http://www.finitron.ca


Tue Apr 28, 2020 4:08 am
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Rob:

You've implemented posit-based arithmetic. It looks that you're either satisfied or at least sufficiently intrigued by their utility that you're adding them to one of your projects. What's your take on them at this point? Good, bad, indifferent, or need more data. One claim made is that they should be faster than IEEE 754 floating point. Have you noticed an improvement in your cycle times by using posits instead of IEEE 754 floating point units?

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Michael A.


Tue Apr 28, 2020 11:44 pm
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I have not finished with them yet (I’ve not tried synthesizing them for size yet for instance), so I don’t know for sure what the timing is like. I suspect that the cycle times and latencies would be very similar to regular floating-point. How well the toolset can retime the logic across registers will affect cycle time. Latency is just a matter of how many layers of registers one wants to insert. I don’t expect drastic differences. Many of the mechanics of dealing with floats or posits are the same. Some operations with posits are simpler such as comparison, and rounding. If there are fewer pipeline stages in rounding results or to handle special cases then latencies may be lower. Posits are more accurate (at least that’s what I’ve read), and software using them may have to be coded differently than for IEEE-fp. Since there is no such thing as ‘NaN’ for posits values that will cause issues must be trapped in software. I think the main benefit of posits is the ability to use smaller data formats in some circumstances and a performance benefit from using posits may come from better cache usage. The fp hardware may not be any faster or smaller, but being able to move less data around will increase performance.

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Robert Finch http://www.finitron.ca


Wed Apr 29, 2020 10:38 pm
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Good point about comparison of posits. I hadn't thought that through, but the encoding appears to be such that integer compares will work just as if the posit was an integer.

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Michael A.


Wed Apr 29, 2020 11:57 pm
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Been contemplating how to implement fused instructions. Fused instructions combine multiple instructions to act as a single instruction. A common fused instruction may be the multiply-add instruction (a * b) + c. First a multiply instruction is done then it is followed by an add instruction. When the processor sees this sequence of instructions, it may fuse the operations performing it as a single unit. A more complex instruction, the dot product may be performed as (a * b) + (c * d), two multiplies and an add. Fused instructions may be issued as separate instructions but executed as a single one. One benefit of fusing instructions is that it makes more register read ports available for an operation. A characteristic of fused instructions is that they have intermediate results that don’t need to be stored to the register file. Only the final result need be stored. An issue I see that arises is how to determine when an intermediate result needs to be stored to the register file and when it doesn’t. A second benefit of fusing instructions is that intermediate results can contain more bits than would fit into a register in order to allow better rounding for more accurate results.
From what I’ve read so far on the net, there is no provision for intermediate results to be stored to a register. Macro fusion examples are simple for instance a compare followed by a branch operation, or using two instructions to perform an indexed load operation.
To hold onto intermediate results which could contain double-width products an intermediate results register file could be used. The register file would need to be spec’d by the instruction. It could lead to instructions like fmul.ddq (multiply double * double, produce quad result). A fused dot product would be then (fmul.ddq,fmul.ddq,fadd.qqd)

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Robert Finch http://www.finitron.ca


Mon Jun 01, 2020 2:47 am
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Do Fused operations apply for complex numbers?


Mon Jun 01, 2020 5:01 pm
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