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 [ 5 posts ] 
 Tiny, superfast gates rival programmable logic 
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Joined: Tue Jan 15, 2013 5:43 am
Posts: 184
Traditionally, discrete logic suggests 14- and 16-pin chips. Each generally contains several identical gates -- an arrangement which often won't suit your needs. (Example: a 74ac00 gives you four NAND gates whether you need that many or not.)

But that barrier -- and the speed barrier -- collapse when using single-gate devices such as those in the 74LVC1G series (NXP, Texas Instruments). These "flyspeck" devices come in various packages, even the largest of which is very small. And, with (typically) one gate per package, they always suit your needs. Moreover, PCB traces can be shorter because each device gets located in the spot it's needed. Best of all, these chips are FAST. They have a maximum propagation time around 3 ns (example: 2.7ns maximum for a SN74LVC1G10 3-input NAND driving 15 pF at 5 volts Vdd. Low voltage operation is somewhat slower.)

Edit: this TI document pertains to their logic-gate devices assembled in a single-, dual-, or triple- gate package.
How to Select Little Logic scya049a.pdf

The selection of logic functions is extensive, as the sampling below shows. Also there are lots of tri-state and open-drain buffers, FET switches and so on not shown. For a complete listing I suggest you visit your favorite supplier's web site and run a search for parts beginning with 74LVC1G. Even that won't be a complete listing, as families other than 74LVC also feature one-gate logic. Notice that some logic functions require an 8-pin package for a single-gate, such as the 74LVC1G139 -- which is half a 74_139 decoder.
sampling of one-gate functions.png

To give an idea of the size, here's a 6-pin SOT-23 package -- the largest of the three available packages -- shown on a protoboard with .1" hole spacing (right) and on another protoboard with .050" hole spacing (left).
SOT-23-6 package on .100 and .050 grid.png

PCB mounting is the norm for these chips, but they could be hacked onto protoboard for one-off and experimental work. As you can see above, a .050" protoboard is more suitable than .100" but either could have SOT-23's soldered to it.

I personally prefer wire-wrap, so I designed some breakout boards to bring these tiny pinouts onto a .1" grid:
1G breakout 'a' and 'b'.png
The upper of the two breakouts shown above has artwork for power traces and bypass capacitors but leaves all the signal pins uncommitted. There's an assumption that pins 2 and 5 on each chip are Gnd and Vcc, and most 74LVC chips seem to match this (although other families may not).

The lower breakout cascades three gates into a fourth gate, resulting in a nine-input gate with a max prop delay of about 6 ns. Note that the gates needn't be identical (can be a mixture of AND NAND XOR NOR etc). One use for a nine-input gate would be fine-grained address decoding for memory-mapped I/O. This breakout can also use '1G373 transparent latches and '1G175 flipflops since these have their outputs on pin 4, same as the AND NAND OR NOR chips.

-- Jeff

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Last edited by Dr Jefyll on Fri Dec 09, 2016 9:00 pm, edited 1 time in total.

Mon Feb 01, 2016 3:25 am WWW

Joined: Wed Jan 09, 2013 6:54 pm
Posts: 1632
Here's a thought - glue these chips upside down on a small board with some header pins, then wire up point to point. Then the board can be reprogrammed by rewiring.

Tue Mar 22, 2016 8:27 pm
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Joined: Tue Jan 15, 2013 5:43 am
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I agree point to point is a useful option. And it makes sense to use the third dimension as you say, bringing the IC pins (or at least some of them) up off the board. But rather than flipping the chip on its back I'd prefer to leave it right side up -- and, rather than using glue for attachment, what I'd suggest is to solder each chips's supply pins (which are centrally placed) to pads or traces on the board. That helps keep the board tidy, since two parallel traces make a nice set of supply rails extending to several IC's, and bypass caps can easily be added. The four corner pins of each IC would be bent upward, and it's those pins that would be done individually, point-to-point.

Of course the other option is to use a breakout board. The ones shown above bring the connections onto a .1" grid, and my intention was that they'd insert in an IC socket -- thence to be attached by wire-wrap or any other method of choice.



Last edited by Dr Jefyll on Tue Mar 22, 2016 9:15 pm, edited 1 time in total.

Tue Mar 22, 2016 9:06 pm WWW

Joined: Wed Jan 09, 2013 6:54 pm
Posts: 1632
Sounds good to me!

Tue Mar 22, 2016 9:10 pm

Joined: Mon Oct 07, 2019 2:41 am
Posts: 256
BigEd wrote:
Sounds good to me!

I was thinking they would be good to interface to say a SD card interface.
And PDP-8 fans out there, the flip/chips can now be reduced in making the classic transistor
PDP-8 1/4 size ...

Thu Oct 10, 2019 10:29 pm
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