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 [ 2 posts ] 
 NED's 16-bit ABLE seen in Synclavier and AppleTalk routers 
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Joined: Wed Jan 09, 2013 6:54 pm
Posts: 1780
From 1973, a 16-bit transport-triggered architecture with just the single opcode MOVE. Apparently, usually programmed in XPL, a PL/I derivative.

There's an explanation and even an HDL model here.

The most notable feature of the Able processor is its single instruction - a MOVE from source to destination. Each instruction has an 8-bit source field and a 8-bit destination field. There is no opcode field. Arithmetic and control operations are encoded as special destinations. This makes the Able a transport-triggered architecture.

The Able had 16 16-bit registers. Memory references used a register for the address, with no addressing arithmetic. The PC was register 15, except in the interrupt state when it was register 14 (register 14 thus served as an interrupt handler pointer).

The Able bus transferred 16-bit data for 7-bit device addresses and 16-bit memory addresses. Bus transfers were asynchronous - the instruction would stall until the device acknowledged the transfer. For example, the single instruction which moved a character from the keyboard to the display would stall until a key was hit. In practice, devices included addresses for control and status registers to avoid such stalls. Late models of the Able, used in the Synclavier, added memory mapping registers to address several gigabytes of audio sample RAM.

Sun Aug 19, 2018 8:34 pm

Joined: Fri May 05, 2017 7:39 pm
Posts: 22
Interesting finding - thx BigEd !

Reading this it reminds me to the "computer 74" from Elektor ("the first DIY computer project from a magazine? 1974 Elektor").

Perhaps J.T.W. Damen was inspired by the ABLE machine?

Fri Sep 14, 2018 7:36 pm
 [ 2 posts ] 

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