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 CS01 
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Joined: Sat Feb 02, 2013 9:40 am
Posts: 1531
Location: Canada
Removed the tri-state outputs of the via6522 component and added output tri-state control ports. This is to allow the tri-state outputs to be implemented at a higher level in the hierarchy, most likely the IOB ports of the FPGA.
Added some more pointer validation checks in the OS. The dump of tasks in the system does not work correctly. It does not dump any task info. It’s a simple search through memory every 1kB for TCBs and the search does not loop correctly, and I am mystified as to why.
The assembler had the operands swapped for immediate mode instructions where the constant exceeded 12-bits in size. This fixed the loop searching for task information, however, now every 1kB page is reported as a task.

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Robert Finch http://www.finitron.ca


Tue Aug 31, 2021 3:32 am WWW

Joined: Sat Feb 02, 2013 9:40 am
Posts: 1531
Location: Canada
Today I have found several software issues that make me think that perhaps RAM bits are not drifting high after all.

Changed the data input path of the CS01 RISC core slightly. The data in was being aligned (shifted) directly on the dat_i signal. This has now been changed to align data using dati which is a registered version of the dat_i signal. The difference is alignment is taking place on a registered value rather than a raw input value.
I took out the readback and retry circuit active during memory writes. It did not seem to be helping and it cut the performance of write operations almost in half.

Found one source of bit errors. The tail end of the ACB (application control block) pointer array was overlapped with the ACB/TCB id pool, which is a set of bits, one for each id. Allocating an ACB/TCB id would set a bit in the ACB pointer space. Conversely, setting an ACB pointer would mark a range of ACBs or TCBs as allocated. Found this error by inspection when comparing the TCB pointer array to the ACB pointer array. The pointer arrays map ids which vary from 0 to 63 to pointers. I started wondering why there was so much more space reserved for TCB pointers. The solution was simple, move the ACB pointer array to an area with enough memory.

Found a bug in the bitfield set/clear/get functions. Calculating the word index into the bitfield needed to be multiplied by four. I am now contemplating adding memory bitfield manipulation instructions as custom instructions. They are not that useful, however.
Found another software bug, when TCB storage was being allocated it was not being mapped into the address space of the system task. This caused all updates to the TCB to go to page zero, the scratch page. It may also explain why when dumping the task list every page was reported as containing a TCB.
A typo in the SwitchIOFocus() routine caused a branch to bad address. This resulted in a trace dump.
Performing an ecall to OS routine was not switching to the OS memory map. There is a fair bit of work being done now just to switch to the OS function and back (20-30 instructions).

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Robert Finch http://www.finitron.ca


Wed Sep 01, 2021 2:30 am WWW

Joined: Sat Feb 02, 2013 9:40 am
Posts: 1531
Location: Canada
Modified the via6522 core so that timer3 works as mtime in a RISCV system. It now counts up instead of down and interrupts if timer compare register matches the count. Also added more registers to the component so that timer 3 may be accessed directly.
Wired up the vendors EMC memory controller that uses an AXI bus for system interface. Using this controller the caused a trace dump to occur. At least the controller performed well enough to do the dump. However, I decided not to use the EMC controller as it is about 500LUTs larger than the home-grown memory controller.

Modified the processor core to automatically switch memory maps corresponding to register sets. A register set is considered to be part of the address space or memory map. Registers are just a high-speed cache for memory locations after all. An exception causes an automatic switch of the address space which includes the memory map and register set. On return from exception the original address space is returned to.
Task switching code was switching the memory map to the target task’s map immediately instead of when the target task was restarted. This caused some values to be reloaded from the wrong spot.
Consolidated two get line() routines into a single routine in the ROM. There are two places line input is being performed, in Tiny Basic and in the ROM monitor. Combining these two routines into a single routine saves some ROM space. There are also other routines that may be consolidated and perhaps added as OS routines. The PRTNUM() routine in Tiny Basic is handy to print numbers.

Added the capability of calling an environment routine from the environment. This requires stacking and unstacking all the registers for the second environment call. This is useful for instance, to call the character put routine which requires an environment call from within the environment.

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Robert Finch http://www.finitron.ca


Fri Sep 03, 2021 6:13 am WWW
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