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 16/32 bit cpu for a late 1976 cpu. 
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Joined: Mon Oct 07, 2019 2:41 am
Posts: 265
Changed the Instruction set around to be more compact a few weeks ago, but software the required a some minor changes in input text formating. Now that I found the typo in the bootrap loader, things seem to work correctly now.
Still not sure if I want to impliment a simple virual memory system. as that makes a OS much more complex with
page faults and traps.
Ben.


Wed Feb 17, 2021 3:33 am

Joined: Mon Oct 07, 2019 2:41 am
Posts: 265
In the last week the FPGA software suddenly decided to build working hard ware again. I have new version of the 8/16/32 bit cpu, with 7 GP registers
and a PC. Addressing modes are R+,# indexed and direct addressing. indexed is 16bit offset, and direct is 512KB.
Hardware is up to 1 MB of ram and with a limited front panel addressing of the First and last 32kb or ram or prom.
No mmu at all. Simple IRQ service.
Data types are signed/unsigned byte and signed/unsigned half words and full words
Working now at FPGA emulation stage, the PCB layout to begin soon. 5 card set, ALU#1 ,ALU#2, Control card, front panel card/rom/io, memory card.
Using 22v10's about 25 IC's are needed for the control card. 50 IC's using rom's only and TTL decoding of microcode. 512 24 bit words of micro code
is used. 2901A's are used in the two alu cards.
16 bit bus/20 bit address lines. Two phase clock @ 5.33 mhz. Byte's sive program ~ 15 seconds. It almost meets my goal, for DOS ERA computer
in only that MMU is missing. It now just needs more software development, and text editor. XMODEM is planned for when a second serial port is addes added.
Ben.


Sun May 09, 2021 2:15 am

Joined: Mon Oct 07, 2019 2:41 am
Posts: 265
I have dropped the 16/32 bit cpu, and moved to a 12/24/48 bit cpu.
2 12 bit alu cards and a control card using CMOS PAL's will make a cleaner
design. 74LSXX logic with PAL glue for easy PCB layout.

Most of the features to move from a simple control computer like the PDP/8
to a larger mico-computer required a larger order code 22 or 24 bits wide with a
11 or 12 bit sized byte, to have a single word memory reference instruction
that was not load/store.

Set in the 1974 to 1977 time frame, memory is around 32kb for a simple
OS and 48Kb for user space programs. DEC PDP/8 RK05 drives (1.4 MB)
and a dual rs232 ports. (2400 baud). Small bios and floating point in PROM.

Code:
  21 0987 6543 2109 8765 4321
 +--+------------------------+
 |aa|Cooo:mmix:x+##:####:####| NORMAL
 +--+------------------------+
  aa  ac   A B X C/S
  xx  index Z/A B X S/C
  mmi mode
  Cooo operation ST LD ADD/ADC SUB/SBC AND BIT OR XOR EQV



About the same size and price as PDP/11. 1.5 us Memory cycle
with a Front Panel.
Ben.


Sun Oct 10, 2021 3:01 am

Joined: Wed Jan 09, 2013 6:54 pm
Posts: 1640
I'm reminded of our adventures with 16, 32 and then 24 bit words for the OPC machines. There's a whole set of tradeoffs depending on instruction encodings, and embedded addresses and constants in the instruction stream.


Mon Oct 11, 2021 12:17 pm

Joined: Mon Oct 07, 2019 2:41 am
Posts: 265
While I did want more features than a basic computer, byte addressing and long data does
require 2 more bits for the order code, and two more bits for the address space. The PDP 11
quickly ended up as the VAX so this factor was never really noticed there. Most of the reason this
order code is bigger, I wanted a few true index/base registers and that required 4 more bits,
This design grew from the happy cute bunny (18 bits). to the horned demon rabbit (22 bits).

Software floating point was secondary goal, and adding long instructions simplfied this goal.
ISP hardware is 90% done, but I need to revise software and add more serial ports and a front panel.
Ben.
If I do continue with a machine larger than 24 bits it would be a 32/64 bit computer (32 bit data path)
using 2901's. Late 1977?
Code:
[COOO][MAAA][MXXX][MUBS][+###][####][####][####]
M=MODE
A=AC
X=INDEX
U=UNSIGNED
B=BYTE
S=SHORT
C:OOO=CARRY AND OPCODE



Mon Oct 11, 2021 7:47 pm
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