Schematics so far.
Attachment:
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| ISA68030 http://anycpu.org/forum/viewtopic.php?f=23&t=938 |
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| Author: | robfinch [ Mon Jul 25, 2022 6:49 am ] |
| Post subject: | ISA68030 |
Spent the last couple of days working on an 68030 master card for an ISA similar bus. The design is being done in schematics. Where possible signals have the expected purpose. For example A0 to A23 are address bus bits. Some signals on the ISA bus are different. Only five IRQs are supported on the bus as IRQ acknowledge signals are present too and this takes 10 pins. I am wondering how to handle the seven DMA channels on the bus. I am thinking since I will probably never get around to using them may be only four channels would be supported ala 68450 DMA controller. Can DMA channels be hacked together for multiple 68450s? The card is going to have 16MB static RAM via RAM modules. The SRAM will operate using the synchronous bus capability of the 68030. I am using a FPGA module to supply the ROM which is byte wide. |
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| Author: | robfinch [ Mon Jul 25, 2022 9:34 am ] |
| Post subject: | Re: ISA68030 |
Schematics so far. Attachment: |
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