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 LALU Computer: Lookup Arithmetic Logic Unit 
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Joined: Sun Dec 19, 2021 1:36 pm
Posts: 10
Location: Michigan USA
Hi, For about the last 4 months I have been designing and building a TTL based computer project using 74LS series IC's. The most notable feature of this project has been to create an Arithmetic Logic Unit using a programmed ROM, instead of using something more traditional like 74LS181 ALU chips. I call this design the Lookup ALU, or "LALU". It really is quote surprising the variety of ALU functions that can be programmed into the ROM. For example: binary logic, flags for conditional jumps, bit shifts, etc.

Also, the hardware controller (which was originally hardwired) also uses a lookup ROM. I call this ROM the Lookup Controller. It was very difficult at first to create a methodolgy to create the binary files for burning to ROM. But after that was mastered, it has become a real joy to work with for the ease of creating or changing instructions to control hardware.

The most recent revision of the LALU computer incorporates a 16 bit address bus for access to 64K of Memory. (A combination of SRAM and Program ROM). This is shown in the attached LALU computer architecture diagram.

Using a Lookup ALU is not a new idea. A fellow hobbyist pointed me to the IBM 1620 CADET Computer from 1959. Possibly other people on this forum know of other examples. I am presently in the process of building cards for BUS input and output, most notably a keyboard card and LCD display card for easy user I/O.

Here is a link to a webpage that describes this project. The 16 bit version of LALU is described near the bottom of the page. I'm always interested to hear ideas, thoughts and comments from other hobbyists. Regards, Michael

http://www.mtmscientific.com/lalu.html


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Sun Jul 31, 2022 8:30 pm WWW

Joined: Mon Oct 07, 2019 2:41 am
Posts: 380
Since you are using table lookup, a decimal computer might be nice.
8 bit byte : flag bit : decimal number 0..99 in binary,+- and field marks or 7 bit ASCII like character.
This way you could emulate the early decimal computers, or punched card eqipment.


Mon Aug 01, 2022 5:14 pm

Joined: Sat Sep 03, 2022 3:04 am
Posts: 29
Got this to adapt TSOP(II)54 MRAM (21 inputs, 16 outputs).
Should yield 64 lookup tables of 8bit+8bit=8bit. Some wasted on flags.
More than enough core left over for RAM/ROM and 16bit counting tables.

Don't intend to magnetize all at once. Pi Pico hasn't enough pins to spare.
Likely use MMBasic to pre-compute & bitbang one function table at a time.
Blan P might abuse the unworldly power and pinout of TWO picos at once...

-update- Parts have been soldered.
This device... https://www.everspin.com/family/mr5a16a?npath=258


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Last edited by Ken KD5ZXG on Wed Sep 14, 2022 4:09 pm, edited 9 times in total.



Sat Sep 03, 2022 3:22 am

Joined: Wed Jan 09, 2013 6:54 pm
Posts: 1718
(Welcome, KD5ZXG!)


Sat Sep 03, 2022 5:37 am

Joined: Sat Sep 03, 2022 3:04 am
Posts: 29
We had been passing some emails, when mmruzek mentioned he had a thread here.

My old half-baked blog can be found at https://hackaday.io/project/173506-lookup-table-alu

Decimal makes a great deal of sense for 32Kx8 ROMs. Need only four input bits per each argument,
a flag input, let the remaining six address bits represent a function. Four bits out, four flags out.
Enough function space to serve both binary and BCD. Fixed point multiplication and division tables
(I would specify at least HL.XYZ fixed points) where 4bit Binary and 4bit BCD math tables diverge.
But 64 is twice as many function tables as I ever considered, perhaps the fixed points could resolve
deeper than three nibbles or digits. Not sure cosines or roots make sense with so few input bits.

Had also been brainstorming a hybrid 7bit plus flag plan, that sometimes works 8bits with no flag.

Conforming to 8bit (too small) or 16bit (again too small, or way too big) makes flag output a pain.
Flag results can be accessed by separate table, but may slow operation when both are referenced.
Sometimes you only need a flag and result byte lookup isn't required, or versa. Simultaneous flag
output is not a problem when result expectations are less than bytewide.


Last edited by Ken KD5ZXG on Wed Sep 14, 2022 4:43 pm, edited 6 times in total.



Sat Sep 03, 2022 8:23 pm
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Joined: Sun Dec 19, 2021 1:36 pm
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Location: Michigan USA
Hi, When it was mentioned to emulate some of the older decimal computers, I didn't really understand what that meant. But I found a great book on the topic. It's "Decimal Computation" by Hermann Schmid of General Electric Company, 1974.

I have yet to find a good book describing the design of ALU circuits. Please chime-in if you have a resource on that topic.


Sat Sep 03, 2022 11:25 pm WWW

Joined: Sun Mar 27, 2022 12:11 am
Posts: 13
Dieter is probably the best resource for TTL ALU design: http://6502.org/users/dieter/index.htm


Sat Sep 03, 2022 11:47 pm

Joined: Mon Oct 07, 2019 2:41 am
Posts: 380
Excess three is nice for decimal math.1 2/1 mulx, 1 inverter and 1 4 bit adder after the alu out.
People complain that decimal math is slow, but most decimal machines have been
serial drum computers, look up tables math (Ibm cadet) or 4 bit calculator chips. Ben.


Sun Sep 04, 2022 4:44 am

Joined: Wed Jan 09, 2013 6:54 pm
Posts: 1718
mmruzek wrote:
Hi, When it was mentioned to emulate some of the older decimal computers, I didn't really understand what that meant. But I found a great book on the topic. It's "Decimal Computation" by Hermann Schmid of General Electric Company, 1974.

Nice! I see we can borrow it at the Internet Archive. You can read the preface and contents pages at once.


Sun Sep 04, 2022 6:15 am
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Joined: Sun Dec 19, 2021 1:36 pm
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DockLazy wrote:
Dieter is probably the best resource for TTL ALU design: http://6502.org/users/dieter/index.htm


Thank You! Some really good information on TTL ALU Design.. Lots of circuit diagrams, and easy-to-follow explanations.


Sun Sep 04, 2022 11:36 pm WWW

Joined: Sat Sep 03, 2022 3:04 am
Posts: 29
EP and EM are never simultaneously invoked. If memory card observes that forbidden pair: LL, LH, LP, IP could be diverted onto the address bus. You then have 16 bytes of SRAM to use as zero page registers and indexes to facilitate the update of MAR by way of A, C, or I/O Bus. Still less juggling than originally drawn. If you could post, PM, or email a schematic of your memory board, I would be more specific. Other things those signals normally do must be inhibited. Higher address bits must default to zero. That sort of specific...

Hopefully your backplane distributes all controls to all cards regardless? If controls other than LL LH are available to address zero page, pointers in SRAM might directly update MAR and bypass wasted steps. Forbidden pair BR with BS might provide one of those address lines, EC with LC maybe another. How might other cards ignore these forbidden zero page combos?


Wed Sep 07, 2022 6:44 am
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Joined: Sun Dec 19, 2021 1:36 pm
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Location: Michigan USA
Here are a few photos of some new cards I have designed and built for the LALU computer. The first card is an LCD Display Module based on the ERMC4002-1 Series of displays. This card is very easy to interface to the LALU bus because it can accept 8 bit parallel input of ASCII characters. The other card is an adapter card which converts a PS/2 keyboard into an 8 bit parallel output emulating the APPLE IIE keyboard. This style of keyboard sets the MSB of the parallel output byte when a new key has been hit. The emulator card is using a PIC in the form of a Pixaxe-20X2 with some code written in Picaxe Basic. My first preference would have been to use an actual APPLE IIE keyboard... but those have become almost impossible to find at a reasonable price.

Michael


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Sat Sep 17, 2022 7:40 pm WWW

Joined: Sat Sep 03, 2022 3:04 am
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A surprising number of USB keyboards can still talk the old standard.


Sat Sep 17, 2022 11:20 pm

Joined: Wed Jan 09, 2013 6:54 pm
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That's an interesting little microcontroller for £5 or so, in 20 pin DIP - and a retrotastic use for it!
https://www.picaxestore.com/picaxe/pica ... s/axe012x2


Sun Sep 18, 2022 8:17 am
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Joined: Sun Dec 19, 2021 1:36 pm
Posts: 10
Location: Michigan USA
With the LALU computer the Controller instruction and ALU instructions are coded into 2 ROM chips. The Controller and ALU can therefore be changed pretty easily. This arrangement makes for a flexible enviroment for development, but it also becomes something of a challenge to keep straight! The 1st layer of operating software is the assembly language. I prefer to use 3 letter mnemonics to identify instructions. In reality each instruction is a hexadecimal code, so it is a straightforward matter to create an Excel spreadsheet with a substitution formula that inputs the mnemonics and outputs hex code. The hex code can then be copied and pasted into a hex file editor page and burned to ROM. (Architecture Note: Register B is now full read and write.)

Presently there are 45 assembly language instructions. Here is a summary of what is available....

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Mon Sep 19, 2022 3:24 pm WWW
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