Last visit was: Wed Mar 26, 2025 7:01 pm
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It is currently Wed Mar 26, 2025 7:01 pm
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DoctorWkt
Joined: Wed May 15, 2019 1:17 am Posts: 25
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Hi all, Warren here. I grew up with Apple ][s and I've mainly done software and network admin in my life. Now I'm discovering the hardware side of things. I somehow managed to build my own 4-bit TTL CPU just by nutting things out myself ( https://github.com/DoctorWkt/CSCv2), and I'm still amazed that it works. Along the way I've learned some Verilog, and now I'm discovering things like ROM latencies and propagation delays that I'd never considered before. Still so much to learn.
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Wed May 15, 2019 1:37 am |
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joanlluch
Joined: Fri Mar 22, 2019 8:03 am Posts: 328 Location: Girona-Catalonia
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Hi Warren,
Welcome to the forums. As you can see from a couple of posts before, I am very new to this forums too. I will be interested to know more and learn from your project, as my set of skills regarding hardware are absolutely basic. As a side note, I also attempt to make my own designed TTL CPU, but in my case it will be a very long journey because I have set a relatively large set of project goals, and I have some health issues that prevent me to work on it for as much as I would like. Anyway, delighted to have someone joining the forums with a particular interest in TTL chips!
Joan
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Wed May 15, 2019 1:19 pm |
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DoctorWkt
Joined: Wed May 15, 2019 1:17 am Posts: 25
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joanlluch wrote: I am very new to this forums too. I will be interested to know more and learn from your project, as my set of skills regarding hardware are absolutely basic. ... Anyway, delighted to have someone joining the forums with a particular interest in TTL chips!
Joan Joan, if you are also new to hardware and want to build a TTL design, that's exactly where I was a couple of years ago. I'd highly recommend you look at my CSCv2 CPU (and video series). There's only 12 chips, each one has a specific job and there is very little "glue" logic. The video series builds it step by step, and also explains the concepts behind each section of the build. Cheers, Warren Edit: also apologies Joan, I've just read the 7400 TTL CPU thread and I can see you are much more informed than I assumed!!
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Thu May 16, 2019 12:47 am |
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commodorejohn
Joined: Wed Oct 23, 2019 1:52 am Posts: 9 Location: Sacramento, CA
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commodorejohn checking in - I'm around on a variety of vintage-computing forums, particularly vcfed.org, 6502.org, and the IRIX Network forums. Decided to check this place out when I ran across the link on 6502.org, as I've had an interest in DIY CPU projects for some time. Still need to do a lot of brushing up on low-level electronics before I'd be ready to put anything together in hardware, but I've been scheming out a couple instruction set/architecture designs to suit my preferences for a while, and I've gotten to the point of starting to implement one in software...but more on that in a dedicated thread...!
_________________ "'Legacy code' often differs from its suggested alternative by actually working and scaling." - Bjarne Stroustrup
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Wed Oct 23, 2019 2:50 am |
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BigEd
Joined: Wed Jan 09, 2013 6:54 pm Posts: 1814
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Welcome!
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Wed Oct 23, 2019 8:38 am |
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robinsonb5
Joined: Wed Nov 20, 2019 12:56 pm Posts: 92
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Nice to see a familiar name or two here from other forums!
I'm Alastair, I grew up first with a Commodore64 before moving onto an Amiga, so naturally I have soft-spot for 68K assembly language.
I've tinkered a fair bit with FPGAs over the last few years, learning enough of both Verilog and VHDL to hack on the Minimig FPGA Amiga replica project. I seem to be de-facto maintainer of the Turbo Chameleon 64 port of Minimig, and have ported cores to that platform and others, as well as tinkering with various FPGA-based SoC projects.
I forked the ZPU_small CPU a few years ago, and created a flexible variant of that, ZPUFlex, for use as a support CPU in retro-computing FPGA cores.
I'm now in the process of creating my own experimental CPU core from scratch, which I shall post about elsewhere in due course.
I stumbled across this forum a couple of days ago, having first found the OPC CPU series mentioned on Hackaday - my search for more information led me here. I'm especially interested in OPC5 because of its amazingly small logic footprint - it will fit as a supporting CPU where others won't.
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Wed Nov 20, 2019 8:40 pm |
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BigEd
Joined: Wed Jan 09, 2013 6:54 pm Posts: 1814
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Welcome! Nice to hear you find the OPC5 attractive, and that it attracted you here!
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Thu Nov 21, 2019 9:27 am |
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floobydust
Joined: Mon Feb 03, 2020 4:08 am Posts: 6 Location: Planet Earth, FL, USA
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Finally joined here... been out on the 6502.org forum for almost 7 years now.... have been involved with computers since the early 70's. Had a great career... 38 years with IBM, early transfer to Boca Raton in '84 to support the IBM PC Products and was part of IBM Software Group before it was called Software Group. Traveled the world for 25+ years working with large account customers, filled up 2 passports, was involved with lots of early technologies but still played with the 6502 during all of it as a hobby. Now retired after 45 years in the workforce and enjoying my hobbies, family and friends. It's a small world, as many same names out here as with the 6502.org forum... who knew.
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Mon Feb 03, 2020 4:33 am |
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joanlluch
Joined: Fri Mar 22, 2019 8:03 am Posts: 328 Location: Girona-Catalonia
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Welcome to the forum !!
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Mon Feb 03, 2020 10:47 am |
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terryporter
Joined: Mon Mar 08, 2021 6:36 am Posts: 2
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Hi Everyone, Interesting small forum you have here; the talk of 6800's etc takes me back to my youth ... I've been fascinated by electronics since my childhood and first worked with embedded in 1976 while a electronics technician as a busy electronics company. Back then I learnt all about building embedded gear while prototyping an iron ore flow gauge which used radioisotopes to measure the flow rate of ore falling off a vibrating feeder in Port Headland, Western Australia. The CPU was a National PACE 16 bit, 40 pin unit in a ceramic package and cost about $275 I was told. Later I fell in love with the 6800 ISA on a HC11 and built projects using an old second hand SWTP development machine (I bought at a disposal auction for $25 AUD) with two 8" hard sectored floppy disks, a editor and assembler and eprom burner. That love still continues to this day, tho I have no desire to revisit the hardware. After a couple of years using a Intel 8085 SDK and programming in machine code, the SWTP box seemed like I had died and gone to Heaven, even if it was plagued by horribly unreliable Molex connectors. Add all the usual suspects, 6502, CDP1802, Z80, 6802, 6805, PIC, 8051, MSP430 etc and we arrive at the present where I use Forth on Cortex-M, mainly STM32F051 and maintain what is basically my blog as I progressed learning Forth starting around 2014. I figured that as there was so little Forth online these days I might as well put my Mecrisp-Stellaris blog online, maybe the information may prove useful to others starting Forth. https://mecrisp-stellaris-folkdoc.sourc ... index.htmlI also produce XSLT recipes for transforming SVD files to Forth Memory Maps and Bitfields, and Assembly equate files for Cortex-M (mostly STM chips), which automatically generates stuff like this: Code: $40021000 constant RCC \ Reset and clock control RCC $0 + constant RCC_CR ( ) \ Clock control register RCC $4 + constant RCC_CFGR ( ) \ Clock configuration register RCC_CFGR RCC $8 + constant RCC_CIR ( ) \ Clock interrupt register RCC_CIR RCC $C + constant RCC_APB2RSTR ( read-write ) \ APB2 peripheral reset register RCC_APB2RSTR and this Code: \ RCC_CR (multiple-access) Reset:0x00000083 : RCC_CR_HSION ( -- x addr ) 0 bit RCC_CR ; \ RCC_CR_HSION, Internal High Speed clock enable : RCC_CR_HSIRDY? ( -- 1|0 ) 1 bit RCC_CR bit@ ; \ RCC_CR_HSIRDY, Internal High Speed clock ready flag : RCC_CR_HSITRIM ( %bbbbb -- x addr ) 3 lshift RCC_CR ; \ RCC_CR_HSITRIM, Internal High Speed clock trimming : RCC_CR_HSICAL ( %bbbbbbbb -- x addr ) 8 lshift RCC_CR ; \ RCC_CR_HSICAL, Internal High Speed clock Calibration : RCC_CR_HSEON ( -- x addr ) 16 bit RCC_CR ; \ RCC_CR_HSEON, External High Speed clock enable Nowadays I'm retired and spend my time making projects, gear and simple software. Everything I publish is either GPL'd or MIT depending on my obligations.
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Mon Mar 08, 2021 8:01 am |
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BigEd
Joined: Wed Jan 09, 2013 6:54 pm Posts: 1814
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Welcome, Terry, great to hear your story!
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Mon Mar 08, 2021 8:12 am |
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robfinch
Joined: Sat Feb 02, 2013 9:40 am Posts: 2262 Location: Canada
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Welcome!
_________________Robert Finch http://www.finitron.ca
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Mon Mar 08, 2021 4:15 pm |
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mmruzek
Joined: Sun Dec 19, 2021 1:36 pm Posts: 92 Location: Michigan USA
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Hi, My name is Michael and I am new to this forum. I've spent alot of time over at the Vintage Computer Forum (vcfed.org) with the same user name. I entered computing in 1975 using paper punch cards running Fortran at the Michigan Terminal System (MTS) in Ann Arbor, Michigan USA. About 10 years ago I launched a kit to build a nearly-identical clone of the IBM 5150 PC Motherboard, which I still offer on my side hustle website MTM Scientific, Inc. For the last couple of years I have been designing and building a 12 bit computer which uses a hard-wired controller with 74181 ALUs to do the logic and math. I am in the process of writing a threaded interpretive language for the project. I call the computer I am building the TTL-Retro. I found this forum pretty much by accident, but I see you all are interested in many of the same topics. I really appreciate the help I have gotten in the past from other people! Here is a link to my latest project. http://www.mtmscientific.com/stack.htmlMy avatar is Mr. Peabody, a cartoon character scientist. He is the inventor of the WABAC machine ("Wayback"), a device for time travel, which seems appropriate for vintage computing enthusiasts.
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Mon Dec 20, 2021 11:02 am |
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robfinch
Joined: Sat Feb 02, 2013 9:40 am Posts: 2262 Location: Canada
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Welcome Michael, great project!
_________________Robert Finch http://www.finitron.ca
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Mon Dec 20, 2021 2:04 pm |
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Sheep64
Joined: Sat Dec 25, 2021 6:49 pm Posts: 6 Location: A magnetic field
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My full introduction is on the 6502 Forum. I write awful 6502 assembly and even worse 68000 assembly. I am a very reluctant user of Raspberry Pi and Arduino. (Both can be improved by dumping most of the default software.) I've had mad ideas for processor architectures for far too long but I now concentrate on 6502 extensions. Although, much of my work is generic and not specific to 6502. This includes: - Project A-Frame: Idiot-Proof Indicator Light which makes LEDs reversible and 5V tolerant.
- Project B-Frame: Dividing Pulses By 2^24
- Feature Tests and Name That Host In Six Bytes led to hairy instruction sequences which allow one binary to run on Z80 CP/M, 6800 FLEX, 6809 FLEX and multiple 6502 systems. This may also work with 8086 and 68000.
- Enclosures For Desktop Computers mostly with imitation Lego.
- GyroScatter Low Density Optical Boot Disk using Gray codes.
- How to connect mouse and 16*16 keyboard matrix over SNES peripheral protocol. Who needs ADB or USB?
- Cell Network Hardware which led to considerations for magnetic storage, 6522/4052/74HC595/74HC238 PS2/I2C/SPI/SNES interface, Quad SPI design and the odd discovery that SNES peripheral protocol can be tunnelled over SP/DIF. (Yes, joystick over audio.)
- RAM stacking, processor stacking, board stacking and mixed chip stacks. I believe that references such as LE74HC574K245N amuse Dr Jefyll and others.
- Our collective struggle with the chip shortage.
- De-compression and caching of subroutines when the full call graph is known. Includes suggestions for a nybble compressor which is also suitable for data.
- Techniques to make multiplication faster on simple processors, such as caching.
- Perl one-liner for 16 bit EEPROM programmer which can be used to program the bitmaps for 16*16 Pixel Tile Video Display And Video Codec
- Binary matrix transpose for audio, video, serial communication and digital LEDs.
- Morse Code - The Debug Protocol Of Champions
- Suggestions for a simple filing system.
- Suggestions for simple games.
- Interrupt Priority Encoding. (anycpu does it correctly, 6502 Forum usually does it wrong.)
- Long/multi-core clock stretching led to 12.5MHz One Bit DAC Using Rational Numbers.
- Project Snail which includes 65816 20 bit address scheme which can be extended to 24 bit or adapted to other processors. It also has privilege bit, discrete SPI, ideas for reducing printed circuit board area and a natty oscillator configuration.
- 1*74HC139 for 4*16KB address decode and read/write qualification. Developed for 6502 but possibly useful elsewhere.
- I collated the techniques to make 6502 with zero glue logic. I didn't think it was possible but it requires a specific type of SRAM and creative use of resistors.
- Suggestions for randyhyde's 65000.
- Suggestions for John West's 65020.
- Suggestions for Proxy's 65CE02 extension.
- Suggestions for MicroCoreLabs' MCL65+.
- My 64 bit SIMD 6502 extension. (Project Manatee. It'll be huge.)
- 65816 EMU Pin and WS2812B Digital LEDs which was extended by plasmo to include M/X pin and UART. I further extended it to include analog servo control. This idea is hugely popular and may have spawned three YouTube videos, so far.
- Suggestions for 8080 on 6502 simulation.
- Suggestions for 65C02 on 6501 simulation. Has many suggestions for hypothetical extensions.
- A large chart which explains the bit fields of multiple 6502 extensions.
- SANEC ADIP chip stacking footprints.
- PCB templates such as TUIT100 and EuroLozenge both with M3 fixing holes at 60mm.
- Miniature racking.
- SHEEPSCII (see username).
- Blitters.
- Text-to-speech which I used to read anycpu and 6502 Forum in full.
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Tue Mar 22, 2022 1:14 pm |
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