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 The Mill CPU - uses a belt, not entirely unlike a stack 
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Joined: Wed Jan 09, 2013 6:54 pm
Posts: 1780
Elsewhere I was reminded that Ivan Godard of Out-of-the-Box Computing is currently releasing presentations about his new CPU architecture (presently simulated, not yet fabricated.)

[Edit:] It's sort of VLIW, with up to 33 operations per cycle. "If the Mill can pull this off, you'll get a CPU that can get a 10x better performance-per-power rating, and that on a smaller die" - commenter on Reddit.

There are various ideas here - dual PCs travelling in opposite directions, for example - but perhaps the most visible feature is that there's no register file, nor a register stack, but a moving queue of registers of some specific length. Results are plucked out of the queue before they fall off the end, the timing and location of the results depending on the fact that all instruction latencies are fixed (for a given implementation.)

"in the coming months, we will add sections for the Belt, Operands and Data, the Memory Hierarchy, Protection, Software Pipelining, Branch Prediction, and other areas."

See
http://staff.science.uva.nl/~poss/posts ... /mill-cpu/
http://www.reddit.com/r/programming/com ... _metadata/
and various videos and presentations:
http://www.youtube.com/watch?v=jNgIdTUmzEQ
http://ootbcomp.com/docs/


Last edited by BigEd on Fri Jan 17, 2014 11:48 am, edited 1 time in total.



Fri Jan 17, 2014 9:56 am
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Joined: Sun Aug 04, 2013 9:02 pm
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It is very reminiscent of reg register ring in SPARC processors. At any time a SPARC function has access to 8 globals registers, 8 local registers, 8 inputs and 8 outputs (if memory serves). When you call a subroutine the ring rotates making the outputs the new inputs and exposing 8 new local variables.

Works really well as long as you do not call deeply and exceed the ring size (which causes the operating system to have to flush the ring to memory)


Fri Jan 17, 2014 11:09 am
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Joined: Wed Jan 09, 2013 6:54 pm
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(you remind me of the story of the x87 stack model, which was supposed to allow faulting so the software could assume an unbounded stack, but it didn't work... See section 3 of http://www.cims.nyu.edu/~dbindel/class/ ... 7stack.pdf
and the section starting "Since floating-point expressions are not that complex, Kahan reasoned that eight registers meant that the stack would rarely overflow" in http://www.engr.colostate.edu/~sudeep/t ... 374493.pdf)


Fri Jan 17, 2014 11:48 am
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Joined: Wed Jan 09, 2013 6:54 pm
Posts: 1780
There's a readable blog post and now something of an official forum/wiki for the Mill:

“The Mill” – It just might Work
Introduction to the Mill CPU Programming Model

via the discussion at https://news.ycombinator.com/item?id=7480278 (which has Ivan Godard as a contributor)


Wed Apr 02, 2014 9:10 am
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