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 "A Microprocessor Chip Designed with the User in Mind" 1977 
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Joined: Wed Jan 09, 2013 6:54 pm
Posts: 1647
An interesting paper from 1977:
    Wickes, W. E. (1977). A Microprocessor Chip Designed with the User in Mind. Computer, 10(1), 18–22. doi:10.1109/c-m.1977.217492

The aim was to make something simple, 8 bit, high performance, in a 28 pin package, at reasonable cost.

The result is the EA9002, a 4MHz microprocessor with 8 bit data and 12 bit physical address. There are 8 general purpose registers and 64 bytes of on chip scratchpad RAM. It's a little unclear whether the instructions are four ticks or eight ticks: a 2 usec instruction time is quoted but the diagram shows 4 clock cycles.

Screenshot 2020-09-13 at 14.42.23.png

As for cost, the illustration is a 200mil square chip, on 3 inch wafers, with a yield of 20%...
Therefore, careful study and agonizing tradeoffs are made on each item which may affect chip size. For example, there are over 5000 transistors contained within 1200 logic equations and 448 bits of static RAM. (The architecture of the 9002 is shown in Figure 2.) This is the most critical function of a microprocessor design and is heavily influenced by the circuit speed, timing, instruction set, and bus structures.

Careful attention was paid to the chip layout so that random logic was minimized while structured logic such as RAMs and bus controls were maximized. The subroutine stack, consisting of eight 12-bit registers and the eight 12-bit general purpose registers, is contained within one RAM block. This implementation helped reduce chip size by minimizing the number of flip-flop registers. The instruction decode control array was implemented as a dynamic logic gating array as opposed to a PLA structure. This is somewhat less flexible than a PLA but required less space than either a PLA or ROM structure for generating macro-type control signals. The EA9002 is 200 x 201 mils.

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Sun Sep 13, 2020 1:45 pm
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