.
Ben notes that FPGA dev boards often come with SDRAM, which is not nearly so easy to use as SRAM.
oldben wrote:
One thing keeping my from buy new FPGA stuff is I don't have SDRAM module for them.
I need to write my own and SDRAM is a pain in the ass to interface, and the doc's are confusing.
Ben.
What to do? Well, I don't have an answer, but I note that it's possible to treat an SDRAM as an 8x slower SRAM, and that might be enough. See
this comment and links within the thread:
Quote:
Here is a much simpler SDRAM implementation from the Mist/Mister project. It is the Gameboy variant that has a 64Mhz clock and accesses the ram (both reads and writes) in a fixed 8 cycles to simulate 8MHz asynchronous DRAM.
Also
this comment builds on the same work:
Quote:
For the
retro computer version, the only components in the project are the ram test (ramtest.v), the pll (pll.v) and the very simple SDRAM controller (sdram.v). I don't think a simpler SDRAM controller than that is possible.
I have now used that simper SDRAM controller in my
NES project.
But perhaps this summary is a good place to start:
