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 Late 1960s Calculator Technology 
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Joined: Mon Aug 14, 2017 8:23 am
Posts: 157
Desktop calculators produced in Japan from 1968 to roughly 1971 present a unique snapshot of electronic computing technology.

This was the age of the minicomputer (PDP-8, PDP-11, DG Nova etc) and these machines represented an investment of tens of thousands of dollars.

For the office and business environment, a new market class of electronic calculating machine was required - something that would replace slower mechanical calculators, perform multi-digit, 4 function decimal arithmetic and sell for under $500.

Transistorised calculators had been around since the early 1960s, but they were expensive to build, contained hundreds of components on multiple pcbs and as such had some reliability issues.

Logic was resistor transistor logic RTL, or diode transistor logic DTL (as used in the early PDP-8) and memory was constructed from discrete transistor flip-flops.

This 1968 Canon 130S is representative of this era. http://madrona.ca/e/eec/calcs/Canon130S.html

From 1968 onwards several Japanese electronic and semiconductior companies started to produce small and medium scale integration (SSI, MSI) circuits specifically intended for the calculator market.

These included integrated bit serial adder/subtractors and multi-stage flip flops. Collectively this family of ICs has become known as JMOS (Japanese MOS).

They featured a 24V logic, where 0V represents logic 1 and -24V represents logic 0.

The flip flops were master-slave types, which had separate clocks for the master stage and for the slave stage.

http://madrona.ca/e/eec/ics/JMOS.html

These JMOS ICs were produced by several companies, utilised the same MOS technology, and often were produced as pin compatible alternatives from different manufacturers - a bit like the 7400 series of TTL.

To keep hardware complexity to a minimum, arithmetic was done in bit-serial fashion using not much more than a single bit full-adder and a flip flop to retain the carry status from bit to bit.

Subtraction was performed by inverting one of the operands using an XOR gate and effectively converting the carry into a borrow when required.

The Toshiba TM4006 is representative of this kind of serial adder/subtractor SSI device.
http://madrona.ca/e/eec/ics/serialadders.html

Multiplication was performed by repeated addition of the multiplicand to an accumulator, controlled by a counter or register that held a value of the multiplier which was decremented for each addition cycle.

Division was achieved by the repeated subtraction of the divisor from the dividend, until the dividend became negative. Each successful subtraction resulted in the increment of a register containing the quotient.

Schemes were derived to improve the efficiency for both multiplication and division for multi-digit BCD operands.

One of the earlier examples of a machine using the JMOS devices is the 1970 Toshiba BC-1212. It uses 38 ICs, 54 transistors and 481 diodes.*

http://madrona.ca/e/eec/calcs/ToshibaBC1212.html

* Almost all of the simple AND and OR gates were constructed from diodes, with one on each input. This accounts for the large number of diodes.

It has been reverse engineered with schematics and principle of operation fully described. The author [B Hilpert] describes it as

"At the user level this is a standard-for-the-period 4-function-with-accumulator model.

Technically, it is notable for a nice, clean, canonical state-machine design, implementing straightforward multiply and divide algorithms. Compared to many of it's period, it's easier to understand at a detailed technical level. It's a good candidate for examination into how bit-serial machines of the era work. The reverse-engineered schematic includes a state diagram and state action descriptions."

From the simple bit serial adder/subtractor such as the TM4006, the manufacturers soon began to integrate more and more of the standard BCD arithmetic logic into SSI/MSI devices - in order to reduce the chip count, and thus the assembly cost.

Hardware to calculate in BCD is significantly more complex than hardware for straight binary operations. Several of the Japanese ICs were devised to overcome these recurring BCD hardware overheads into integrated devices.

Within a few years, Texas Instruments, Rockwell, Mostek and others had designed LSI devices which would reduce the calculator chip count to perhaps 6 devices and eventually a calculator on a single chip.

The bit serial architecture lasted only a few short years, and was soon replaced with 4-bit parallel BCD arithmetic.

The Japanese calculator manufacturer Busicom approached Intel in 1969 for assistance in designing a new calculator chip set, reducing 3 LSI devices to 1 device, and this indirectly led to the development of the first commercial microprocessor - the Intel 4004.

Shift register memory was designed primarily for the bit serial calculator market, and 48-bit, 60-bit and 64-bit shift registers were created in SSI specifically to hold 12 and 15 digit BCD numbers.

Shift register memory also served the computing industry for a few years for small stores until Intel and others created commercially viable random access integrated memory.

The long 48, 60 and 64 bit shift registers, used for holding multiple BCD digits were produced in large volumes to satisfy the serial calculator market. When calculators moved to parallel arithmetic, large volumes of them appeared on the surplus market.

Don Lancaster has an interesting set of articles on using (by then, surplus) calculator shift register memory for his September 1973 TV Typewriter and other projects.


Last edited by monsonite on Tue Feb 23, 2021 12:25 pm, edited 1 time in total.



Mon Feb 22, 2021 4:50 pm

Joined: Wed Jan 09, 2013 6:54 pm
Posts: 1644
Good points all!

I think calculators were a great business: there's volume, and the possibility of rapid iteration, and no special need for backward compatibility. And they can act as a technology driver.


Mon Feb 22, 2021 5:05 pm

Joined: Mon Aug 14, 2017 8:23 am
Posts: 157
Ed,

I must admit calculator history is a fascinating "rabbit hole".

I was seeking inspiration for my bit-serial cpu architecture and discovered a whole tranche of technical iinformation about late 1960s calculators and the move from SSI and MSI to LSI.

A bit serial adder/subtractor might appear simple enough on paper, but when it comes to controlling it with a sequencer and handling the carry operations for both addition and subtraction - it turns into a major design problem. This is further aggravated when you want to keep the logic gate count to a minimum.

Historically, early electronic calculators provide a very good illustration of Moore's Law - from 1965 to 1975 calculator prices dropped from $1000 to $50 or even $20 by 1975. Technology progressed from discrete transistor and DTL to LSI devices consisting of a few thousand transistors.

From a technical point of view, studying how 50 year old electronic calculators worked, exercises the grey matter, and if you are a hardware or software enthusiast, just thinking about the 4 basic operations, and how you would implement that today in hardware or software certainly gets the brain working.


Mon Feb 22, 2021 6:21 pm

Joined: Wed Jan 09, 2013 6:54 pm
Posts: 1644
Agreed, fascinating, and much to know.

I imagine engineers of the day would be very familiar with mechanical calculators, as users, and perhaps also know something of the mechanisms, so digit-serial actions would be relatively natural, as would digit-by-digit shifting.

In passing, I saw this description of a cube root algorithm:
The cube root of a number y, cbrt(y), is implemented using the following algorithm:
x <- y
for k=1 to 19, x <- sqrt(sqrt(x * y))


which is cute, I think. Although it involves quite a lot of square rooting. (Square root-finding being akin to division: "The square root is implemented using Toepler's algorithm". See http://user.mendelu.cz/marik/mechmat/sqrt/)


Mon Feb 22, 2021 9:08 pm

Joined: Mon Aug 14, 2017 8:23 am
Posts: 157
BigEd wrote:
I imagine engineers of the day would be very familiar with mechanical calculators, as users, and perhaps also know something of the mechanisms, so digit-serial actions would be relatively natural, as would digit-by-digit shifting.


The engineers of that time would also have been familiar with early electronic computers - from EDSAC to the LGP-30 where serial arithmetic would have been standard - but I agree that they would also have a greater working familiarity with mechanical calculators, slide rules and tables of logarithms, trig functions and other computational aids and algorithms that had been devised to make complex computations somewhat easier.

In my exploration of this "rabbit warren" I came across a fascinating machine from 1966 that had been built as a high school project by Spanish student Jordi Vidal Potau:

http://www.vintagecalculators.com/html/ ... -2000.html

If you scroll down far enough in this article, you will find links to circuit schematics and other technical information.

The machine was fully transistorised apart from the Nixie display tubes and capable of 4 functions, square roots , variable decimal point and signed digits.

Inspiration for the machine came from studying a Facit ESA-01 mechanical calculator - another rabbit hole........

http://www.vintagecalculators.com/html/ ... sa-01.html

It should be remembered that also from this era came the Wireless World Computer by Brian Crank - covered elsewhere in this forum, and the Kenbak-1.

The "Wireless World" from 1967 machine was an arithmetic trainer which lacked stored program memory - due to prohibitive memory costs.

The Kenbak-1 was a real cpu with a useful instruction set and meaningful addressing modes. Unfortunately it was constrained by only 256 bytes of memory.

Calculators employing bit serial arithmetic enjoyed a golden age in the mid to late 1960s - driven by the market economics of transistor based computing and the emergence of SSI and MSI MOS devices aimed specifically at the desktop calculator market.

By the time these desktop calculators were on general sale, the designers were already working on the next generation of calculators - smaller, lighter, lower power,greater functionality, fewer ICs - dominated by LSI technology from Intel, Mostek and TI.

Bit serial arithmetic was a techological stepping stone, that had served the early vacuum tube electronic computers for 20 years and found its way into transistorisation and eventually small scale integration by way of the electronic desktop calculator market.

There is no question that the electronic calculator market helped accelerate the commercial development of SSI to MSI and LSI and laid the foundations for the general purpose microprocessors (Intel 4004) that appeared in the early 1970s.

For more information about single chip calculators you might like

http://www.vintagecalculators.com/html/ ... -chip.html


Tue Feb 23, 2021 12:21 am

Joined: Mon Aug 14, 2017 8:23 am
Posts: 157
Pico Electronics Ltd - the unknown UK calculator chip manufacturer.

Founded in summer 1970 in Glenrothes, Scotland, out of the wreckage of Elliott Automation, Pico were possibly the first company to have a single chip calculator.

https://www.xnumber.com/xnumber/micropr ... istory.htm

Pico's patent for a single chip floating point calculator

https://web.archive.org/web/20160623175 ... 001566.pdf


Tue Feb 23, 2021 1:34 am

Joined: Wed Jan 09, 2013 6:54 pm
Posts: 1644
.
good links!

Goran Devic is starting a calculator project, and has some good information and links in the first post:
https://baltazarstudios.com/calculator1/


Tue Feb 23, 2021 2:35 pm
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