The pdp 3 (1960) had a 5 us core memory access time and a 200 ns clock and gazzliions of shinny new transistors Using modern dual ported memory (15 ns) how fast could a 74Fxxx version run at. Ben.

My guess, better than 30ns or 33MHz.
The memory in an FPGA is something like 5ns. Maybe able get better than 50MHz.

What is the instruction set of a PDP3 like?

The computer has a 15 bit index adder and 36 bit alu to the ACC-I/O.
A simplfied version has a PC (15 bits), MAR(15) bits, AC(36 bits),(I/O,MQ 36 bits),
MBR(36 bits) for the data path. This is stretched PDP-1.
Ben.

I think a 36-bit add would be around 35ish ns with a 'F181s and 'F182s, worst case. Sandwiching that between a couple of D flip flops would add another 10ns.

That would give a data path about 50 ns. Assuming the Address logic is the same speed, and memory access
read is 25 ns. Write back of ram to emulate core 25 ns.
Compared to 1960, this is 5 us / .050 us or 100x faster. .010 us for the FPGA, is 500x faster, in 2020,
60 years later. That is ~ 8x faster per decade for the FPGA, ~ 1.5 x faster for TTL.
Sadly the TTY is 110 baud.
Ben.