Might be of interest - HP's calculators ran on an inhouse CPU design with a 14 digit BCD floating point representation:
http://www.hpmuseum.org/techcpu.htm
http://web.cecs.pdx.edu/~rc/Projects/HD ... /vger.html

and here are a couple of (re)implementations:
VHDL: https://github.com/vhdlnerd/classicHp (may be a work in progress)
Verilog: http://www.systemyde.com/hp41/hardware.html

(via the announcement thread at http://www.hpmuseum.org/forum/thread-994-post-7809.html)