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 65ISR 
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Joined: Sun Jul 23, 2017 1:06 am
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I have a design for a processor (file attached) in case anybody is interested.

I don't know anything about Verilog --- I will have to learn it to implement this thing --- I'm just a programmer.

I will look into what you guys have going on over here. I am not familiar with this forum.
Quote:
Abstract:

The 65ISR is derived from the 6502, but it only supports ISRs. There is no main program.
It is an 8-bit processor, but it addresses 16MB so it can hold entire files in memory.
All variables are in zero-page. There is only indirect access to other memory.
We have a page,Y addressing-mode that is useful for circular buffers and small arrays.
We have a bank,W addressing-mode that is useful for accessing alternate 64KB banks, such as in a RAM-disk.
The 65ISR has 1-bit variables similar to the i8032. These are useful for state-machines, such as in a PLC.
The 65ISR-chico version lacks all instructions that use the W register, and the PC register is only 12-bit.


Attachments:
File comment: simple processor based on 6502
65ISR.txt [27.66 KiB]
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Sun Jul 23, 2017 1:46 am
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Welcome, Hugh! Take a look around, and you should recognize at least a few people from elsewhere ... I hope that you like it here! I felt at-home almost immediately.

Mike B.


Sun Jul 23, 2017 3:56 am
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Welcome Hugh!


Sun Jul 23, 2017 7:23 am
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barrym95838 wrote:
Welcome, Hugh! Take a look around, and you should recognize at least a few people from elsewhere ... I hope that you like it here! I felt at-home almost immediately.

Mike B.

Thanks Michael :)

How is your 65M32 design coming?
I was somewhat dubious of designing a 32-bit processor because the ARM Cortex dominates so much --- that is like challenging a silverback gorilla to a boxing match --- even processors such as the ColdFire, that are pretty cool by any estimate, have become obsolete (crushed by the gorilla!).

I'm aiming very low with my 65ISR design. There is no main-program, just ISRs. The chico version doesn't even support subroutines or 16-bit pointers. I may be aiming too low, and will shoot myself in the foot --- it is possible that everybody will say that even the 6805 is more powerful, and the 6805 is long obsolete...

You likely know more about 6502 assembly-language than I do. You have stayed in practice all of these years! Do you think that 6502 enthusiasts will feel at home with the 65ISR? Can meaningful programs be written for the 65ISR, or is it too limited?

BTW: What computer do you write 6502 assembly-language for? I am familiar with the Commodore-64 and Apple-IIc.
I liked the Commodore-64 --- the C64 had very good support for sound and graphics! --- I used SuperForth on the C64 and ISYS Forth on the Apple-IIc (actually a Laser-128 clone).


Mon Jul 24, 2017 5:18 am
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A design which is based around ISRs only sounds refreshingly original. Things will have to be done a bit differently. Sounds good to me!


Mon Jul 24, 2017 6:20 am
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Tor wrote:
A design which is based around ISRs only sounds refreshingly original. Things will have to be done a bit differently. Sounds good to me!

I've been told elsewhere that this idea is not very original. It is called "event driven processing" and is well-known. :|

I find the idea to be intriguing! :) The advantages are:

1.) Fewer clock cycles are required because there is no save and restore of registers for each ISR.

2.) The processor is simple, because there is no return-stack. This helps put it within reach as my first-ever HDL effort. The chico version is super-simple, so I can start with that.

The disadvantages are:

1.) Interrupt latency is greater for the high-priority interrupts because they may have to wait for a low-priority ISR to finish, because they can't interrupt it.

2.) Programming is more difficult. The main-program has to be cut up into short code chunks for VIRQ that each end in RTI allowing an interrupt to occur. It is up to the programmer to manually save and restore context from one code chunk to the next. In the chico version, there are no subroutines or pointers.

Pretty intriguing idea!
It is an experiment in designing the simplest possible processor that is capable of supporting meaningful programs.


Tue Jul 25, 2017 7:29 pm
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Hugh Aguilar wrote:
How is your 65M32 design coming?
I was somewhat dubious of designing a 32-bit processor because the ARM Cortex dominates so much --- that is like challenging a silverback gorilla to a boxing match --- even processors such as the ColdFire, that are pretty cool by any estimate, have become obsolete (crushed by the gorilla!).

I have had to push it to the back-burner for the last several months. I have a 76-year-old house that is falling apart, and several cars that are falling apart too. I have also been spending a lot of effort trying to get a new job with better pay and less physical strain. My mother-in-law is starting to become more and more dependent on me as well. The 65m32 has been living in my imagination for nearly half of my 51 years, so I think that it can wait until I can give it a better time-slice of my attention, assuming that the competition quiets down a bit.

I'm not trying to compete with ARM or anything else ... I just want to show something I think is neat to people who might be interested and agree. If they agree then great; if they disagree or lose interest, then not-so-great. I'm not going to be offended ... I don't have a great deal of emotional investment in it, but I would be very pleased if it made it into an FPGA one of these days. The simulator is first, and it's still only about 80% complete.

Quote:
I'm aiming very low with my 65ISR design. There is no main-program, just ISRs. The chico version doesn't even support subroutines or 16-bit pointers. I may be aiming too low, and will shoot myself in the foot --- it is possible that everybody will say that even the 6805 is more powerful, and the 6805 is long obsolete...


Just follow your instincts. If you get discouraged, take a step back and see if anything can be saved for your next plan. The journey can be as rewarding as the destination, if you have the right frame of mind.

Quote:
You likely know more about 6502 assembly-language than I do. You have stayed in practice all of these years! Do you think that 6502 enthusiasts will feel at home with the 65ISR? Can meaningful programs be written for the 65ISR, or is it too limited?


It looks very "learnable" to me.

Quote:
BTW: What computer do you write 6502 assembly-language for? I am familiar with the Commodore-64 and Apple-IIc.
I liked the Commodore-64 --- the C64 had very good support for sound and graphics! --- I used SuperForth on the C64 and ISYS Forth on the Apple-IIc (actually a Laser-128 clone).


If I want to try out some 6502 creations, I whip out AppleWin. It's convenient and familiar to me. My first home computer was an Apple ][+, and it was and always will be my first love. I also had a C=64, and I liked it, but it never had a chance to replace the ][+ in my heart.

Mike B.


Wed Jul 26, 2017 1:30 am
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barrym95838 wrote:
Hugh Aguilar wrote:
How is your 65M32 design coming?
I was somewhat dubious of designing a 32-bit processor because the ARM Cortex dominates so much --- that is like challenging a silverback gorilla to a boxing match --- even processors such as the ColdFire, that are pretty cool by any estimate, have become obsolete (crushed by the gorilla!).

I'm not trying to compete with ARM or anything else ... I just want to show something I think is neat to people who might be interested and agree. If they agree then great; if they disagree or lose interest, then not-so-great. I'm not going to be offended ... I don't have a great deal of emotional investment in it, but I would be very pleased if it made it into an FPGA one of these days. The simulator is first, and it's still only about 80% complete.

Well, if you do make it into an FPGA eventually, maybe I will write a Forth for it. I skimmed over your description and it looks like it would be a reasonable target for Forth.

I think I mentioned this before, but I have a <SWITCH in ANS-Forth that generates a jump-table (unlike the CASE that generates nested IF statements). This would work well for a simulator. I would recommend writing both the simulator and the assemble in Forth rather than C --- Forth supports meta-compiling, and it is interactive! --- I wrote MFX in UR/Forth when I worked at Testra; realistically this would have been several times more difficult in C (difficult enough that it wouldn't have succeeded).

What are your thoughts on Michael Morris' M65C02A soft-core? If I do write a Forth for a 6502-derivative, that would be the most likely choice --- a 16-bit processor might get some use as a micro-controller, which seems unlikely for a 32-bit processor because (as I said) the ARM Cortex dominates so much.

I started another thread in the nostalgia section: viewtopic.php?f=22&t=423
The M65C02A would be a possible choice here.

P.S. I hope things work out for you in regard to finding a less physically-demanding job, taking care of your family, etc.. :)


Wed Jul 26, 2017 4:11 am
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Hugh Aguilar wrote:
Tor wrote:
A design which is based around ISRs only sounds refreshingly original. Things will have to be done a bit differently. Sounds good to me!

I've been told elsewhere that this idea is not very original. It is called "event driven processing" and is well-known. :|
Yes, I wanted to say that it resembled event driven software.. but I was on a mobile device and couldn't write much. So, the concept is known of course, but mostly from software. I like the idea of a CPU that works that way, and only that way, in hardware.
[Edit: Typo : even -> event]


Last edited by Tor on Thu Jul 27, 2017 6:40 am, edited 1 time in total.



Wed Jul 26, 2017 6:48 am
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Tor wrote:
Hugh Aguilar wrote:
Tor wrote:
A design which is based around ISRs only sounds refreshingly original. Things will have to be done a bit differently. Sounds good to me!

I've been told elsewhere that this idea is not very original. It is called "event driven processing" and is well-known. :|
Yes, I wanted to say that it resembled even driven software.. but I was on a mobile device and couldn't write much. So, the concept is known of course, but mostly from software. I like the idea of a CPU that works that way, and only that way, in hardware.

I think it is an intriguing idea! Doing it in hardware boosts the speed because there is no save and restore of registers. I wonder how much could be done on such a system...

I got the idea from the Parallax Propeller. There you have six coprocessors handling I/O concurrently. With my 65ISR you have multiple IRQs, so it is not concurrent, but they have to wait for the other ISRs to finish. Programming would be similar though.

I have been talking to Walter Banks of ByteCraft --- he told me about his RS08 processor.
The 65ISR-chico is more powerful because it has an indexed addressing mode, which is useful for circular buffers.
The RS08 has a link register for subroutines however, that the 65ISR-chico lacks, although the 65ISR uses the W register for this.
The 65ISR or 65ISR-chico would be similar to the RS08. A compiler, or at least a smart assembler, would be needed to prevent clashes between subroutines using the same zero-page variables as local variables --- this is because the 65ISR lacks a stack for local variables --- the RS08 is always programmed in C, and never in raw assembly-language, for the same reason.

I'm mostly a programmer with an interest in compilers. Hardware design isn't my thing. My interest is in writing a compiler for such a challenging target. :)


Wed Jul 26, 2017 6:12 pm
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Hugh Aguilar wrote:
I got the idea from the Parallax Propeller. There you have six coprocessors handling I/O concurrently. With my 65ISR you have multiple IRQs, so it is not concurrent, but they have to wait for the other ISRs to finish. Programming would be similar though.
Eight, not six.. :)
Yes, I almost mentioned the Propeller in my reply. The difference is of course that the Propeller 1 doesn't need interrupts at all. But it's a valid comparision - on the Propeller you write your code/program/driver to run in one cog, and then another for another cog. No need for a main program.


Thu Jul 27, 2017 6:43 am
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Tor wrote:
Hugh Aguilar wrote:
I got the idea from the Parallax Propeller. There you have six coprocessors handling I/O concurrently. With my 65ISR you have multiple IRQs, so it is not concurrent, but they have to wait for the other ISRs to finish. Programming would be similar though.
Eight, not six.. :)
Yes, I almost mentioned the Propeller in my reply. The difference is of course that the Propeller 1 doesn't need interrupts at all. But it's a valid comparision - on the Propeller you write your code/program/driver to run in one cog, and then another for another cog. No need for a main program.

Eight then --- I was just going by memory, so I had it wrong --- I have not actually used the Propeller, but just read about it and found it to be an intriguing idea.

Have you used the Propeller? How well did that work out? What did you use it for?

I'm surprised that it has become so popular, because it is very non-traditional. It seems like it was designed for fast I/O but minimal processing.

I'm not really expecting my 65ISR to become popular among hobbyists, or even among professionals doing onesy-twosy projects. There are lots of chips, such as the PIC24 or the ARM Cortex, that are much more powerful. Cost is not very important on onesy-twosy projects. Such a tiny processor as the 65ISR might be used in high-volume projects in which counting pennies is important, but maybe not because FPGA chips are expensive --- an ASIC would be great --- that would require a huge upfront investment though.

When I worked at Testra I encouraged them to build an experimenter board based on their MiniForth processor. They didn't do this.
I was told that they didn't want to sell to hobbyists because: "hobbyists require too much support, and they don't have any money."

That was in 1994/1995. The MiniForth was built on the Lattice isp1048 PLD. In those days, it was possible to build a custom processor that was both less expensive than and faster than the competitor's system (using an MC68000 and programming in C). Nobody else has ever built a custom processor on the Lattice PLD --- it was only possible for Testra (they had written their own HDL in Forth, rather than use Lattice Design Language provided by Lattice).

The MiniForth is now called the RACE and is built on an FPGA, and is implemented in VHDL rather than any custom HDL (a custom HDL is not possible anymore). It is a different world now. Lots of people build custom processors on FPGA chips. None of these really compete well against the ARM Cortex in either price or performance. The custom processors are mostly used when custom I/O is needed that isn't available in an off-the-shelf chip and/or there is a speed bottleneck that can be relieved by adding some extra instructions to the ISA.

That is my understanding of when and why FPGA processors are used. I don't have any actual experience other than with the MiniForth, and that was over 20 years ago.


Thu Jul 27, 2017 9:39 pm
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Hugh Aguilar wrote:
When I worked at Testra I encouraged them to build an experimenter board based on their MiniForth processor. They didn't do this.
I was told that they didn't want to sell to hobbyists because: "hobbyists require too much support, and they don't have any money."

When I worked in applications engineering at M/A Com PHI which made VHF & UHF power transistors, I was told the same thing when I thought there might be a sizeable market among radio amateurs. However, I think one big thing that made for Microchip's growth in the mid-1990's was that they offered their free assembler and simulator and a very low-cost programmer, things that were no big deal to companies but huge to hobbyists who got going on PIC microcontrollers, and when they graduated in engineering and got jobs, they took it into the workplace. Of course today there are several well established microcontrollers, so it would be harder to elbow your way into the market.

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Thu Jul 27, 2017 11:04 pm
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Garth wrote:
Hugh Aguilar wrote:
When I worked at Testra I encouraged them to build an experimenter board based on their MiniForth processor. They didn't do this.
I was told that they didn't want to sell to hobbyists because: "hobbyists require too much support, and they don't have any money."

When I worked in applications engineering at M/A Com PHI which made VHF & UHF power transistors, I was told the same thing when I thought there might be a sizeable market among radio amateurs. However, I think one big thing that made for Microchip's growth in the mid-1990's was that they offered their free assembler and simulator and a very low-cost programmer, things that were no big deal to companies but huge to hobbyists who got going on PIC microcontrollers, and when they graduated in engineering and got jobs, they took it into the workplace. Of course today there are several well established microcontrollers, so it would be harder to elbow your way into the market.

Well, that was their policy. I didn't say that I agreed with it.
They had experience with this though. When the company was called Hartronix they advertised in "Forth Dimensions" to sell their bit-slice Forth processor. It is possible that this experience was bad --- too much of a hassle supporting hobbyists --- not enough money to make it worth the time and effort.

MicroChip is a big company that can afford to hire help-desk employees. At a small company, who exactly is going to man the help-desk? I wasn't volunteering for this, because I'm a programmer --- I can see how the help-desk could become very time-consuming and tedious (it has been said that there is no such thing as a dumb question, but that isn't really true!).

I agree that MicroChip is successful because they provide good development tools for free, and a lot of support. The early PIC chips were difficult to program, but people still used them, mostly because MicroChip provided a lot of support.

Over on the 6502 forum I was told that it would not just be hard for me to elbow into the market, but impossible. The only possibility is that my chip ends up on http://www.opencores.org as an open-source freebie. Maybe it will get picked up by somebody for use in a commercial product, but I wouldn't necessarily hear about this --- nobody is going to say: "thank you" --- by that time, I've already provided all of the tools (assembler, compiler, etc.) they need, and all of this is open-source, so they have no reason to communicate with me.

sark02 wrote:
Tools are very important to anyone wanting to pick up your work. You're not going to sell this. Don't be under any illusions here. There's no real scenario where that will happen. Professional engineers who go out and buy 3rd party intellectual property go to established companies with a track record and look for RTL, test benches, often proven tape-out, parameters, power estimates in various technologies, professional support, software tools and lots and lots of legal paperwork. They likely want to find software engineers with existing knowledge of the architecture, so something bespoke is hard to sell, and they want a toolchain that's stable and easy to use. For a processor core it's common to have a JTAG-based debug port, too. They don't want to add new instructions and modify the tools. They're not building a processor chip, they're building a chip that happens to contain a processor (for reasons). I'm generalizing, of course.

So... what's left? opencores.org. You give your processor and tools to the world and say, "Here it is, I hope you like it". Both hobbyists and professionals go to opencores.org looking for ways to build or prototype their ideas. The bar is much lower, and the chance of acceptance much higher. A wishbone interface is the processor to system interface is appreciated, but for a 6502-style design it might kill the bus performance so something more native might be a better choice. Documentation for both the processor RTL and the tools is important, as is cleanly written code.


Fri Jul 28, 2017 1:21 am
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I suppose it's hard to predict what will make something successful. I have a friend who's in advertising, and he says the same thing, and that sometimes strategies you think will succeed don't, and vice-versa. We see examples of products like this in the markets, whether it's something really good that's misunderstood or perhaps doesn't hit the market window perfectly so it does poorly, or something that's lousy but is pressed by a strong sales team taking advantage of certain circumstances (or in some cases, probably not microprocessors, even creating fear). Some advertising tactics try to be self-fulfilling prophecy. "This is the next big standard that everyone will be going to; so don't be left behind." Industry magazines which are always trying to see further into the future to be ahead of their competitors, and after doing their research into new things in development, add their own hopefully self-fulfilling prophecies, when they really don't know.

I've had a few of these situations over the years:
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Fri Jul 28, 2017 1:53 am
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